Re: [U-Boot] [PATCH v2 07/11] Exynos542x: cache: Disable clean/evict push to external

2015-02-17 Thread Minkyu Kang
Hi, On 03/02/15 17:18, Akshay Saraswat wrote: > L2 Auxiliary Control Register provides configuration > and control options for the L2 memory system. Bit 3 > of L2ACTLR stands for clean/evict push to external. > Setting bit 3 disables clean/evict which is what > this patch intends to do. > > Signe

[U-Boot] [PATCH v2 07/11] Exynos542x: cache: Disable clean/evict push to external

2015-02-03 Thread Akshay Saraswat
L2 Auxiliary Control Register provides configuration and control options for the L2 memory system. Bit 3 of L2ACTLR stands for clean/evict push to external. Setting bit 3 disables clean/evict which is what this patch intends to do. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Tested-b