Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-08-05 Thread Scott Wood
On Wed, 2015-08-05 at 22:12 +, Marcel Ziswiler wrote: > On Tue, 2015-07-28 at 03:55 +0200, Marcel Ziswiler wrote: > > > > On 27 July 2015 21:57:14 CEST, Scott Wood > > wrote: > > > > - writel(virt_to_phys(buf), &info->reg->data_block_ptr); > > > > + writel((u32)bbstate.bounce_buffer,

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-08-05 Thread Marcel Ziswiler
On Tue, 2015-07-28 at 03:55 +0200, Marcel Ziswiler wrote: > > On 27 July 2015 21:57:14 CEST, Scott Wood > wrote: > > > - writel(virt_to_phys(buf), &info->reg->data_block_ptr); > > > + writel((u32)bbstate.bounce_buffer, &info->reg > > > ->data_block_ptr); > > > > Why are you converting u

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Scott Wood
On Tue, 2015-07-28 at 03:55 +0200, Marcel Ziswiler wrote: > On 27 July 2015 21:57:14 CEST, Scott Wood wrote: > > On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: > > > From: Marcel Ziswiler > > > > > > Integrate cache alignment bounce buffer to workaround issues as > > follows: > > > >

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Marcel Ziswiler
On 28 July 2015 01:32:10 CEST, Scott Wood wrote: >On Mon, 2015-07-27 at 17:28 -0600, Simon Glass wrote: >> Hi Scott, >> >> On 27 July 2015 at 13:57, Scott Wood wrote: >> > On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: >> > > From: Marcel Ziswiler >> > > >> > > Integrate cache ali

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Marcel Ziswiler
On 27 July 2015 21:57:14 CEST, Scott Wood wrote: >On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: >> From: Marcel Ziswiler >> >> Integrate cache alignment bounce buffer to workaround issues as >follows: >> >> Loading file '/boot/zImage' to addr 0x0100 with size 4499152 >> (0x00

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Scott Wood
On Mon, 2015-07-27 at 17:28 -0600, Simon Glass wrote: > Hi Scott, > > On 27 July 2015 at 13:57, Scott Wood wrote: > > On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: > > > From: Marcel Ziswiler > > > > > > Integrate cache alignment bounce buffer to workaround issues as follows: > > >

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Simon Glass
Hi Scott, On 27 July 2015 at 13:57, Scott Wood wrote: > On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: >> From: Marcel Ziswiler >> >> Integrate cache alignment bounce buffer to workaround issues as follows: >> >> Loading file '/boot/zImage' to addr 0x0100 with size 4499152 >> (0x0

Re: [U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-27 Thread Scott Wood
On Tue, 2015-07-21 at 00:35 +0200, Marcel Ziswiler wrote: > From: Marcel Ziswiler > > Integrate cache alignment bounce buffer to workaround issues as follows: > > Loading file '/boot/zImage' to addr 0x0100 with size 4499152 > (0x0044a6d0)... > ERROR: v7_dcache_inval_range - start address is

[U-Boot] [PATCH v2 09/16] mtd/nand/tegra: alignment workaround

2015-07-20 Thread Marcel Ziswiler
From: Marcel Ziswiler Integrate cache alignment bounce buffer to workaround issues as follows: Loading file '/boot/zImage' to addr 0x0100 with size 4499152 (0x0044a6d0)... ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is