On Wed, Sep 04, 2019 at 04:01:34PM +0530, Lokesh Vutla wrote:
> SoCs with K3 architecture have an integrated Arm Cortex-R5F subsystem
> that is comprised of dual-core Arm Cortex-R5F processor cores. This R5
> subsytem can be configured at boot time to be either run in a LockStep
> mode or in an
SoCs with K3 architecture have an integrated Arm Cortex-R5F subsystem
that is comprised of dual-core Arm Cortex-R5F processor cores. This R5
subsytem can be configured at boot time to be either run in a LockStep
mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem
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