On Wed, 2014-03-26 at 10:01 +0100, Wolfgang Denk wrote:
I'm not an expert for ARM, but this indeed looks suspiscious - thanks
for reporting this.
FYI I made the change which prompted this and the resulting code was the
same see https://groups.google.com/forum/#!topic/linux-sunxi/REZ18q0wcDY
The
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+ cfg = readl(pio-cfg[0] + index);
+ cfg = ~(0xf offset);
+ cfg |= val offset;
+
+ writel(cfg, pio-cfg[0] + index);
clrsetbits_le32() here.
I looked at this transform in a few different contexts and one concern I
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
+int sunxi_gpio_get_cfgpin(u32 pin);
+int sunxi_gpio_set_drv(u32 pin, u32 val);
+int sunxi_gpio_set_pull(u32 pin, u32 val);
+int name_to_gpio(const char *name);
+#define name_to_gpio
On Wednesday, March 26, 2014 at 09:30:38 AM, Ian Campbell wrote:
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+ cfg = readl(pio-cfg[0] + index);
+ cfg = ~(0xf offset);
+ cfg |= val offset;
+
+ writel(cfg, pio-cfg[0] + index);
clrsetbits_le32() here.
On Wednesday, March 26, 2014 at 09:33:01 AM, Ian Campbell wrote:
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
+int sunxi_gpio_get_cfgpin(u32 pin);
+int sunxi_gpio_set_drv(u32 pin, u32 val);
+int sunxi_gpio_set_pull(u32 pin, u32
Dear Ian,
[Cc: list truncated / changed]
In message 1395822638.29683.9.ca...@dagon.hellion.org.uk you wrote:
I looked at this transform in a few different contexts and one concern I
had was that readl and writel have barriers in them (after the read and
before the write respectively) while
Dear Ian Campbell,
In message 1395822781.29683.12.ca...@dagon.hellion.org.uk you wrote:
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
+int sunxi_gpio_get_cfgpin(u32 pin);
+int sunxi_gpio_set_drv(u32 pin, u32 val);
+int
On Wed, 2014-03-26 at 10:03 +0100, Wolfgang Denk wrote:
Dear Ian Campbell,
In message 1395822781.29683.12.ca...@dagon.hellion.org.uk you wrote:
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
+int sunxi_gpio_get_cfgpin(u32 pin);
On Wednesday, March 26, 2014 at 10:39:16 AM, Ian Campbell wrote:
On Wed, 2014-03-26 at 10:03 +0100, Wolfgang Denk wrote:
Dear Ian Campbell,
In message 1395822781.29683.12.ca...@dagon.hellion.org.uk you wrote:
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote:
+int
Dear Ian Campbell,
In message 1395826756.22808.13.ca...@kazak.uk.xensource.com you wrote:
Please add a comment to explain that.
Unless you object I think I'll do as Marek suggested name the function
sunxi_name_to_gpio and make the #define to that, it seems more
consistent that way.
On Friday, March 21, 2014 at 10:54:19 PM, Ian Campbell wrote:
[...]
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c new file mode 100644
index 000..8f5cbfe
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Carl van
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