Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-04-05 Thread Jagan Teki
On Wed, Apr 5, 2017 at 5:29 AM, Fabio Estevam wrote: > Hi Jagan, > > On Tue, Apr 4, 2017 at 2:27 PM, Jagan Teki wrote: > >> No, this isn't issue, just want to understand how you create reg init >> in SPL in mx6q_dcd_table, means did you follow any

Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-04-04 Thread Fabio Estevam
Hi Jagan, On Tue, Apr 4, 2017 at 2:27 PM, Jagan Teki wrote: > No, this isn't issue, just want to understand how you create reg init > in SPL in mx6q_dcd_table, means did you follow any order. because I'm > planning move *dl.cfg DCD to SPL Ok, got it. I thought you

Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-04-04 Thread Jagan Teki
On Tue, Apr 4, 2017 at 9:20 PM, Fabio Estevam wrote: > On Tue, Apr 4, 2017 at 12:47 PM, Jagan Teki wrote: >> Any help? > > Sorry, didn't have time to look at this issue. > > At least SPL U-Boot boots fine in this board. Can you also try U-Boot > from

Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-04-04 Thread Fabio Estevam
On Tue, Apr 4, 2017 at 12:47 PM, Jagan Teki wrote: > Any help? Sorry, didn't have time to look at this issue. At least SPL U-Boot boots fine in this board. Can you also try U-Boot from NXP and try to debug it? ___ U-Boot

Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-04-04 Thread Jagan Teki
Any help? On Wed, Mar 29, 2017 at 8:45 PM, Jagan Teki wrote: > Hi Fabio, > > On Mon, Sep 26, 2016 at 5:44 PM, Fabio Estevam wrote: >> From: Fabio Estevam >> >> When using SPL on i.mx6 we frequently notice some DDR

Re: [U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2017-03-29 Thread Jagan Teki
Hi Fabio, On Mon, Sep 26, 2016 at 5:44 PM, Fabio Estevam wrote: > From: Fabio Estevam > > When using SPL on i.mx6 we frequently notice some DDR initialization > mismatches between the SPL code and the non-SPL code. > > This causes stability issues like

[U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table

2016-09-26 Thread Fabio Estevam
From: Fabio Estevam When using SPL on i.mx6 we frequently notice some DDR initialization mismatches between the SPL code and the non-SPL code. This causes stability issues like the ones reported at 7dbda25ecd6d7c ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid