On 02/04/2014 15:55, nitin.g...@freescale.com wrote:
> From: Nitin Garg
>
> A short loop including a DMB instruction might cause a denial of
> service on another processor which executes a CP15 broadcast operation.
> Exists on r1, r2, r3, r4 revisions.
>
> Signed-off-by: Nitin Garg
> Acked-by:
Hi Stefano,
Errata 742230 applies to r1p0, r1p1, r1p2, r1p3, r2p0, r2p1,
r2p2 revision of Cortex-A9. Errata 794072 applies to r1, 2,
r3, r4 revisions. Software workaround is same for both.
Since diff products use diff revisions of core, I would
suggest to have it this way. Otherwise it might le
Hi Nitin,
On 02/04/2014 15:55, nitin.g...@freescale.com wrote:
> From: Nitin Garg
>
> A short loop including a DMB instruction might cause a denial of
> service on another processor which executes a CP15 broadcast operation.
> Exists on r1, r2, r3, r4 revisions.
>
> Signed-off-by: Nitin Garg
>
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
Acked-by: Dirk Behme
---
README |1 +
arch/arm/cpu/ar
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
Acked-by: Dirk Behme
---
README |1 +
arch/arm/cpu/ar
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