Hi Simon,
On Sun, Aug 14, 2011 at 4:39 PM, Simon Guinot wrote:
> Hi Aneesh,
>
> On Thu, Aug 11, 2011 at 08:05:42PM +0530, Aneesh V wrote:
>> c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
>> to board_init_r(). This enables d-cache for all ARM boards.
>> As a result some of the arm
Hi Aneesh,
On Thu, Aug 11, 2011 at 08:05:42PM +0530, Aneesh V wrote:
> c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
> to board_init_r(). This enables d-cache for all ARM boards.
> As a result some of the arm boards that are not cache-ready
> are broken. Revert this change and all
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.
Also add some docu
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