[U-Boot] [PATCH v3 3/6] mmc: dcache: allocate cache aligned buffer for scr and switch_status

2011-10-12 Thread Anton Staaf
Currently the sd_change_freq function allocates two buffers on the stack that it passes down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for

Re: [U-Boot] [PATCH v3 3/6] mmc: dcache: allocate cache aligned buffer for scr and switch_status

2011-10-12 Thread Mike Frysinger
built fine for me Acked-by: Mike Frysinger -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH v3 3/6] mmc: dcache: allocate cache aligned buffer for scr and switch_status

2011-10-25 Thread Wolfgang Denk
Dear Anton Staaf, In message <1318463764-28244-4-git-send-email-robot...@chromium.org> you wrote: > Currently the sd_change_freq function allocates two buffers on the > stack that it passes down to the MMC device driver. These buffers > could be unaligned to the L1 dcache line size. This causes