Re: [U-Boot] [PATCH v4 1/2] armv8/ls1043a: fixup GIC offset according to SVR and SCFG_GIC400_ALIGN[GIC_ADDR_BIT]

On 10/26/2016 03:39 AM, Wenbin Song wrote: >>> + >>> +ENTRY(smp_kick_all_cpus) >>> + /* Kick secondary cpus up by SGI 0 interrupt */ >>> + mov x29, lr /* Save LR */ >>> + bl fix_gic_offset >>> + bl gic_kick_secondary_cpus >>> + mov lr, x29

Re: [U-Boot] [PATCH v4 1/2] armv8/ls1043a: fixup GIC offset according to SVR and SCFG_GIC400_ALIGN[GIC_ADDR_BIT]

Hi: york Best Regards Wenbin Song > -Original Message- > From: york sun > Sent: Wednesday, October 26, 2016 4:35 AM > To: Wenbin Song ; albert.u.b...@aribaud.net; > Mingkai Hu ; u-boot@lists.denx.de > Subject: Re: [PATCH v4 1/2] armv8/ls1043a:

Re: [U-Boot] [PATCH v4 1/2] armv8/ls1043a: fixup GIC offset according to SVR and SCFG_GIC400_ALIGN[GIC_ADDR_BIT]

On 10/24/2016 12:51 AM, Wenbin song wrote: > The LS1043A rev1.1 silicon supports two types of GIC offset: 4K alignment > and 64K alignment. The bit SCFG_GIC400_ALIGN[GIC_ADDR_BIT] is used to choose > which offset will be used. > > The LS1043A rev1.0 silicon only supports the CIG offset with 4K

[U-Boot] [PATCH v4 1/2] armv8/ls1043a: fixup GIC offset according to SVR and SCFG_GIC400_ALIGN[GIC_ADDR_BIT]

The LS1043A rev1.1 silicon supports two types of GIC offset: 4K alignment and 64K alignment. The bit SCFG_GIC400_ALIGN[GIC_ADDR_BIT] is used to choose which offset will be used. The LS1043A rev1.0 silicon only supports the CIG offset with 4K alignment. If GIC_ADDR_BIT bit is set, 4K alignment is