Re: [U-Boot] [PATCH v4 2/8] ARM: add secure monitor handler to switch to non-secure state

2013-08-27 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/27/2013 05:51 AM, Andre Przywara wrote: > On 08/27/2013 02:23 AM, Masahiro Yamada wrote: >> Hello Andre, >> >>> +/* the vector table for secure state */ +_monitor_vectors: + >>> .word 0/* reset */ +.word 0 /* undef */ +adr pc, >>> _s

Re: [U-Boot] [PATCH v4 2/8] ARM: add secure monitor handler to switch to non-secure state

2013-08-27 Thread Andre Przywara
On 08/27/2013 02:23 AM, Masahiro Yamada wrote: Hello Andre, +/* the vector table for secure state */ +_monitor_vectors: + .word 0 /* reset */ + .word 0 /* undef */ + adr pc, _secure_monitor + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 +

Re: [U-Boot] [PATCH v4 2/8] ARM: add secure monitor handler to switch to non-secure state

2013-08-26 Thread Masahiro Yamada
Hello Andre, > +/* the vector table for secure state */ > +_monitor_vectors: > + .word 0 /* reset */ > + .word 0 /* undef */ > + adr pc, _secure_monitor > + .word 0 > + .word 0 > + .word 0 > + .word 0 > + .word 0 > + .word 0 /* pad */ Could you explain why the

[U-Boot] [PATCH v4 2/8] ARM: add secure monitor handler to switch to non-secure state

2013-08-09 Thread Andre Przywara
A prerequisite for using virtualization is to be in HYP mode, which requires the CPU to be in non-secure state first. Add a new file in arch/arm/cpu/armv7 to hold a monitor handler routine which switches the CPU to non-secure state by setting the NS and associated bits. According to the ARM archite