On 03/22/2016 10:43 PM, Saksham Jain wrote:
> This commit solves CAAM coherency issue on ls2080. When Caches are
> enabled and CAAM's DMA's AXI transcations are not made cacheable, Core
> reads/write data from/to Caches and CAAM does from Main Memory. This
> forces data flushes to synchronize
This commit solves CAAM coherency issue on ls2080. When Caches are
enabled and CAAM's DMA's AXI transcations are not made cacheable, Core
reads/write data from/to Caches and CAAM does from Main Memory. This
forces data flushes to synchronize various data structures. But even if
any data in
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