On Thu, 2019-02-14 at 17:27 +0100, Marek Vasut wrote:
> On 2/14/19 4:37 PM, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-02-14 at 16:21 +0100, Marek Vasut wrote:
> > >
> > > On 2/14/19 4:15 PM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
>
On 2/14/19 4:37 PM, Chee, Tien Fong wrote:
> On Thu, 2019-02-14 at 16:21 +0100, Marek Vasut wrote:
>> On 2/14/19 4:15 PM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
>
>
> On Thu, 2019-02-14 a
On Thu, 2019-02-14 at 16:33 +, Westergreen, Dalon wrote:
> On Thu, 2019-02-14 at 15:15 +, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> > >
> > > On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> > > >
> > > > On Thu, 2019-02-14 at 11:42 +0100, Marek
On Thu, 2019-02-14 at 16:59 +, Chee, Tien Fong wrote:
> On Thu, 2019-02-14 at 16:33 +, Westergreen, Dalon wrote:
> > On Thu, 2019-02-14 at 15:15 +, Chee, Tien Fong wrote:
> > > On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> > > > On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> >
On Thu, 2019-02-14 at 16:33 +, Westergreen, Dalon wrote:
> On Thu, 2019-02-14 at 15:15 +, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> > >
> > > On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> > > >
> > > > On Thu, 2019-02-14 at 11:42 +0100, Marek
On Thu, 2019-02-14 at 15:15 +, Chee, Tien Fong wrote:
> On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> > On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> > > On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
> > > > On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
> > > > >
> > > > > On We
On Thu, 2019-02-14 at 16:21 +0100, Marek Vasut wrote:
> On 2/14/19 4:15 PM, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> > >
> > > On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
On 2/14/19 4:15 PM, Chee, Tien Fong wrote:
> On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
>> On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
>
>
> On Wed, 2019-02-13 a
On Thu, 2019-02-14 at 13:28 +0100, Marek Vasut wrote:
> On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
> > >
> > > On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Wed, 2019-02-13 at 17:25 +0100, Marek Vasut wrote:
On 2/14/19 12:38 PM, Chee, Tien Fong wrote:
> On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
>> On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
>>>
>>> On Wed, 2019-02-13 at 17:25 +0100, Marek Vasut wrote:
On 2/13/19 3:18 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien
On Thu, 2019-02-14 at 11:42 +0100, Marek Vasut wrote:
> On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
> >
> > On Wed, 2019-02-13 at 17:25 +0100, Marek Vasut wrote:
> > >
> > > On 2/13/19 3:18 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add sup
On 2/14/19 7:50 AM, Chee, Tien Fong wrote:
> On Wed, 2019-02-13 at 17:25 +0100, Marek Vasut wrote:
>> On 2/13/19 3:18 PM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add support for loading FPGA bitstream to get DDR up running before
>>> U-Boot is loaded into DDR. Boot dev
On Wed, 2019-02-13 at 17:25 +0100, Marek Vasut wrote:
> On 2/13/19 3:18 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add support for loading FPGA bitstream to get DDR up running before
> > U-Boot is loaded into DDR. Boot device initialization, generic
> > firmware
> >
On 2/13/19 3:18 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Add support for loading FPGA bitstream to get DDR up running before
> U-Boot is loaded into DDR. Boot device initialization, generic firmware
> loader and SPL FAT support are required for this whole mechanism to work.
From: Tien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee
---
changes for v7
- Removed
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