> -Original Message-
> From: Z.Q. Hou
> Sent: Wednesday, December 28, 2016 11:41 AM
> To: Prabhakar Kushwaha ; u-
> b...@lists.denx.de; albert.u.b...@aribaud.net; york sun ;
> Mingkai Hu ; Calvin Johnson
> Subject: RE: [PATCHv3 1/2] armv8/fsl-lsch2: refactor the clock system
> initializat
Hi Prabhakar,
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2016年12月28日 17:27
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; york sun ; Mingkai Hu
> ; Calvin Johnson
> Subject: RE: [PATCHv3 1/2] armv8/fsl-lsch2: refactor the clock system
> initialization
>
Hi Prabhakar,
Thanks a lot for your comments!
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2016年12月28日 12:06
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; york sun ; Mingkai Hu
> ; Calvin Johnson
> Subject: RE: [PATCHv3 1/2] armv8/fsl-lsch2: refactor the
> -Original Message-
> From: Z.Q. Hou
> Sent: Tuesday, December 27, 2016 3:58 PM
> To: Prabhakar Kushwaha ; u-
> b...@lists.denx.de; albert.u.b...@aribaud.net; york sun ;
> Mingkai Hu ; Calvin Johnson
> Subject: RE: [PATCHv3 1/2] armv8/fsl-lsch2: refactor the clock system
> initialization
Hi Prabhakar,
Thanks a lot for your comments!
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2016年12月27日 16:59
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; york sun ; Mingkai Hu
> ; Calvin Johnson
> Cc: Z.Q. Hou
> Subject: RE: [PATCHv3 1/2] armv8/fsl-lsch
> -Original Message-
> From: Zhiqiang Hou [mailto:zhiqiang@nxp.com]
> Sent: 2016年12月27日 15:36
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun
> ; Mingkai Hu ; Prabhakar
> Kushwaha ; Calvin Johnson
>
> Cc: Z.Q. Hou
> Subject: [PATCHv3 1/2] armv8/fsl-lsch2: refactor th
> -Original Message-
> From: Zhiqiang Hou [mailto:zhiqiang@nxp.com]
> Sent: Tuesday, December 27, 2016 1:06 PM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun
> ; Mingkai Hu ; Prabhakar
> Kushwaha ; Calvin Johnson
>
> Cc: Z.Q. Hou
> Subject: [PATCHv3 1/2] armv8/fsl-ls
From: Hou Zhiqiang
Up to now, there are 3 kind of SoCs under Layerscape Chassis 2,
like LS1043A, LS1046A and LS1012A. But the clocks tree has a
lot of differences, for instance, the IP modules have different
dividers to derive its clock from Platform PLL. And the core
cluster PLL and platform PLL
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