Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-22 Thread Pavel Machek
Hi! Comment what kind of errata this is working around? I'll have to ask around. It is to workaround the computational of SDRAM rows. The info is then used to calculate the SDRAM size. By doing this, we can remove from hardcoding the SDRAM size into the code. More info at

Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-22 Thread Chin Liang See
Hi, On Tue, 2015-06-09 at 10:51 -0500, Dinh Nguyen wrote: On 6/9/15 6:55 AM, Pavel Machek wrote: Hi! +struct sdram_prot_rule { + uint64_tsdram_start; /* SDRAM start address */ + uint64_tsdram_end; /* SDRAM end address */ + uint32_trule; /* SDRAM

Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-09 Thread Pavel Machek
Hi! +struct sdram_prot_rule { + uint64_tsdram_start; /* SDRAM start address */ + uint64_tsdram_end; /* SDRAM end address */ + uint32_trule; /* SDRAM protection rule number: 0-19 */ + int valid; /* Rule valid or not? 1 - valid, 0 not*/

Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-09 Thread Dinh Nguyen
On 6/9/15 6:55 AM, Pavel Machek wrote: Hi! +struct sdram_prot_rule { +uint64_tsdram_start; /* SDRAM start address */ +uint64_tsdram_end; /* SDRAM end address */ +uint32_trule; /* SDRAM protection rule number: 0-19 */ +int valid; /* Rule

Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-09 Thread Wolfgang Denk
Dear Pavel, In message 20150609115532.GA29408@amd you wrote: U-Boot is normally spelled U-Boot. You have two different variants in comments here. Thanks for pointing out. This is actually quite important as U-Boot is _not_ a copyrighted name, while some other spellings are (search for text

[U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

2015-06-02 Thread dinguyen
From: Dinh Nguyen dingu...@opensource.altera.com This patch enables the SDRAM controller that is used on Altera's SoCFPGA family. This patch configures the SDRAM controller based on a configuration file that is generated from the Quartus tool, sdram_config.h. Signed-off-by: Dinh Nguyen