On Mon, Jan 21, 2019 at 12:32:18PM +0100, Maciej Zagrabski wrote:
> K4B2G1646EBIH9 Samsung memory chip used now on chiliSOM requires
> refresh register REF CTRL to be initialized with large enough
> value, faster than it is implemented in `config_sdram` in ddr.c
> for am33xx, that mean before
K4B2G1646EBIH9 Samsung memory chip used now on chiliSOM requires
refresh register REF CTRL to be initialized with large enough
value, faster than it is implemented in `config_sdram` in ddr.c
for am33xx, that mean before setting ZQ CTRL. Change should
not interferee with already supported DDR chips
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