On 28 November 2016 at 02:34, Lokesh Vutla wrote:
> Add support for enabling d-cache in SPL. The sequence in SPL tries to
> replicate the sequence done in U-Boot except that MMU entries were added
> for SRAM.
>
> Signed-off-by: Lokesh Vutla
> ---
> arch/arm/include/asm/cache.h | 1 +
> arch
On Mon, Nov 28, 2016 at 03:04:45PM +0530, Lokesh Vutla wrote:
> Add support for enabling d-cache in SPL. The sequence in SPL tries to
> replicate the sequence done in U-Boot except that MMU entries were added
> for SRAM.
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
Tom
signatur
Add support for enabling d-cache in SPL. The sequence in SPL tries to
replicate the sequence done in U-Boot except that MMU entries were added
for SRAM.
Signed-off-by: Lokesh Vutla
---
arch/arm/include/asm/cache.h | 1 +
arch/arm/lib/cache-cp15.c| 46 +++-
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