The existing stack size was only sufficient for four CPUs.
Keep lower stack range address page alignment intact, and
move the lower stack range address down a page. This has
the effect of expanding the stack range by a single page,
which is enough for four more CPUs.
Signed-off-by: Timothy Pearson <tpear...@raptorengineering.com>
---
arch/arm/cpu/armv7/psci.S | 1 +
arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 4 ++--
arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 87c0c0b..18a0cc2 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -203,6 +203,7 @@ ENTRY(psci_get_cpu_stack_top)
add r5, r5, #0x2000 @ Skip two pages
lsr r5, r5, #12 @ Align to start of page
lsl r5, r5, #12
+ add r5, r5, #0x1000 @ Skip an additional page
sub r5, r5, #4 @ reserve 1 word for target PC
sub r0, r5, r0 @ here's our stack!
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index 90b5bfd..d35b63e 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -32,8 +32,8 @@
* ._secure_text section
* text_end to ALIGN_PAGE(text_end):
* nothing
- * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x1000)
- * 1kB of stack per CPU (4 CPUs max).
+ * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x2000)
+ * 1kB of stack per CPU (8 CPUs max).
*/
.pushsection ._secure.text, "ax"
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index e15d587..b8ac50e 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -32,8 +32,8 @@
* ._secure_text section
* text_end to ALIGN_PAGE(text_end):
* nothing
- * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x1000)
- * 1kB of stack per CPU (4 CPUs max).
+ * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x2000)
+ * 1kB of stack per CPU (8 CPUs max).
*/
.pushsection ._secure.text, "ax"
--
2.8.0.rc3
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