On Thu, Jan 31, 2019 at 07:34:13PM +0800, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Firmware loader would encounter problem if the block device is accessed
> before initializing it. This patch would adding the support of probing
> block device and initializing block before the b
On Mon, Feb 25, 2019 at 10:11:45AM +, Ibai Erkiaga wrote:
> HVC call makes use of 6 mandatory arguments rather than 7 in the same way
> as SMC calls. The 7th argument is optional (Client ID) for both HVC and
> SMC but is implemented as 16-bit parameter and register R7 or W7. The aim
> of this
On Mon, Feb 11, 2019 at 06:29:24PM +0100, Heinrich Schuchardt wrote:
> The unit tests in test/lib/hexdump.c are not related to the device tree.
> So they should be executed via `ut lib` and not via `ut dm`.
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Simon Goldschmidt
Applied to u-bo
On Tue, Feb 12, 2019 at 12:27:02AM -0800, chee.hong@intel.com wrote:
> From: Chee Hong Ang
>
> Allow PSCI layer to handle any SiP service functions added by
> platform vendors. PSCI layer will look for SiP service function
> in the SiP function table located in '._secure_svc_tbl_entries'
> s
On Fri, Mar 15, 2019 at 03:14:30PM +0100, Philippe Reynes wrote:
> From: Brian Norris
>
> Linux commit 28b8b26b308 ("mtd: add get/set of_node/flash_node helpers")
>
> We are going to begin using the mtd->dev.of_node field for MTD device
> nodes, so let's add helpers for it. Also, we'll be makin
On Tue, Feb 12, 2019 at 12:27:03AM -0800, chee.hong@intel.com wrote:
> From: "Ang, Chee Hong"
>
> When PSCI is enabled, we are expecting U-Boot which now act
> as EL3 software will handle all the PSCI calls. We won't need
> fwcall as no further HVC or SMC are needed.
>
> Signed-off-by: Ang,
On Wed, Dec 26, 2018 at 05:20:35PM +0100, Heinrich Schuchardt wrote:
> The 'exception' command allows to test exception handling.
>
> This implementation supports ARM, x86, RISC-V and the following exceptions:
> * 'breakpoint' - prefetch abort exception (ARM 32bit only)
> * 'unaligned' - data ab
On 4/22/19 12:48 PM, Tom Rini wrote:
> On Mon, Apr 01, 2019 at 05:32:17PM -0500, Dinh Nguyen wrote:
>
>> The cache UCLASS will be used for configure settings that can be found
>> in a CPU's L2 cache controller.
>>
>> Add a uclass and a test for cache.
>>
>> Reviewed-by: Simon Glass
>> Signed-of
> This fixes RK3288 SPL hanging or hitting this assert:
> drivers/core/ofnode.c:183: ofnode_first_subnode: Assertion
> `ofnode_valid(node)' failed.
>
> Signed-off-by: Urja Rannikko
> Reviewed-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
> drivers/pinctrl/pinctrl-uclass.c | 3 +++
> 1
> This failed and caused a boot failure on c201, and afaik
> the pins should be setup by the new pinctrl driver.
>
> Signed-off-by: Urja Rannikko
> Reviewed-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
> arch/arm/mach-rockchip/rk3288-board.c | 12
> 1 file changed, 12 dele
> TIMER7_BASE is no used by source code now, remove it.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
> ---
>
> arch/arm/include/asm/arch-rockchip/hardware.h | 2 --
> 1 file changed, 2 deletions(-)
>
Applied to u-boot-rockchip, thanks!
> Even though the priv-structure and the claim-bus function contain
> logic for 16bit frames and for unidirectional transfer modes, neither
> of these is used anywhere in the driver.
>
> This removes the unused (as in "has no effect") logic and fields.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> The maximum transfer length (in a single transaction) for the Rockchip
> SPI controller is 64Kframes (i.e. 0x1 frames) of 8bit or 16bit
> frames and is encoded as (num_frames - 1) in CTRLR1. The existing
> code subtracted the "minus 1" twice for a maximum transfer length of
> 0x (64K - 1
> To support unaligned output buffers (i.e. 'in' in the terminology of
> the SPI framework), this change splits each 16bit FIFO element after
> reading and writes them to memory in two 8bit transactions. With this
> change, we can now always use the optimised mode for receive-only
> transcations i
> The logic in the main transmit loop took a bit of reading the TRM to
> fully understand (due to silent assumptions based in internal logic):
> the "wait until idle" at the end of each iteration through the loop is
> required for the transmit-path as each clearing of the ENA register
> (to update
> The SPI controller's documentation (I only had access to the RK3399,
> RK3368 and PX30 TRMs) specifies that, when operating in master-mode,
> the controller will stop the SCLK to avoid RXFIFO overruns and TXFIFO
> underruns. Looks like my worries that we'd need to support DMA-330
> (aka PL330) t
> For the RK3399-Q7 we recommend storing SPL and u-boot.itb in the
> on-module 32MBit (and sometimes even larger, if requested as part of a
> configure-to-order configuration) SPI-NOR flash that is clocked for a
> bitrate of 49.5MBit/s and connected in a single-IO configuration (the
> RK3399 only s
> While rkspi_enable_chip is called with true/false everywhere else in
> the file, one call site uses '0' to denot 'false'.
> This change this one parameter to 'false' and effects consistency.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/spi/rk_spi.c | 2 +-
> 1 file changed, 1 insertio
> In analysing delays introduced for large SPI reads, the absence of any
> indication when a delay was inserted (to ensure the CS toggling is
> observed by devices) became apparent.
>
> Add an additional debug-only debug message to record the insertion and
> duration of any delay (note that the de
On Tue, Mar 12, 2019 at 01:18:46AM +, Bryan O'Donoghue wrote:
> This patch adds a check for the default FIT config to iminfo. Once applied
> any signing of the config will show a pass fail similar to rsa+/rsa-.
>
> Output looks like this:
>
>Hash(es) for Image 0 (kernel@1): sha1+
>Ha
On Mon, Apr 01, 2019 at 05:32:17PM -0500, Dinh Nguyen wrote:
> The cache UCLASS will be used for configure settings that can be found
> in a CPU's L2 cache controller.
>
> Add a uclass and a test for cache.
>
> Reviewed-by: Simon Glass
> Signed-off-by: Dinh Nguyen
> ---
> v4: re-order includes
On Mon, Mar 18, 2019 at 06:16:55AM +, Pankit Garg wrote:
> Signed-off-by: Pankit Garg
> ---
> Changes for v2:
> - Remove CRC calculation as it is already part of env_import
> - Update env_addr after env_import
>
> env/mmc.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --gi
Hi Steven,
On Mon, Apr 22, 2019 at 2:51 PM zhaoyifan wrote:
>
> Hi friend,
>
>
>
> Could you please advice the the problem with RK3399 in detail?
Sorry, couldn't get which issue are you talking about?
Mainline u-boot work well on OrangePI, if you want to look refer the
doc patch[1] or wiki[2]
Hi Philipp,
On Mon, Apr 22, 2019 at 12:11 AM Philipp Tomsich
wrote:
>
> > u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and
> > which is U-Boot specific devicetrees binding.
> >
> > Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot
> > bindings will move it future
> u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and
> which is U-Boot specific devicetrees binding.
>
> Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot
> bindings will move it future based on the requirement.
>
> This would help to sync the devicetrees from Linux
> Since rockchip have an individual doc/README.rockchip, it would
> be better to update the same instead of maintaining it separately
> in board files.
>
> So, add the documentation for rk3399
> - procedure to build
> - procedure to boot from SD
>
> Signed-off-by: Jagan Teki
> ---
> doc/README.
> Add initial support for Orangepi RK3399 board.
>
> Specification
> - Rockchip RK3399
> - 2GB/4GB DDR3
> - 16GB eMMC
> - SD card slot
> - RTL8211E 1Gbps
> - AP6356S WiFI/BT
> - HDMI In/Out, DP, MIPI DSI/CSI
> - Mini PCIe
> - Sensors, Keys etc
> - DC12V-2A and DC5V-2A
>
> Commit details about Lin
> Sync rk3399-opp.dtsi from Linux.
>
> Linux commit details about the rk3399-opp.dtsi sync:
> "arm64: dts: rockchip: use SPDX-License-Identifier"
> (sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905)
>
> Signed-off-by: Jagan Teki
> ---
> arch/arm/dts/rk3399-opp.dtsi | 133 +
> This failed and caused a boot failure on c201, and afaik
> the pins should be setup by the new pinctrl driver.
>
> Signed-off-by: Urja Rannikko
> Reviewed-by: Simon Glass
> ---
> arch/arm/mach-rockchip/rk3288-board.c | 12
> 1 file changed, 12 deletions(-)
>
Reviewed-by: Philip
> This fixes RK3288 SPL hanging or hitting this assert:
> drivers/core/ofnode.c:183: ofnode_first_subnode: Assertion
> `ofnode_valid(node)' failed.
>
> Signed-off-by: Urja Rannikko
> Reviewed-by: Simon Glass
> ---
> drivers/pinctrl/pinctrl-uclass.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> The SPL for the Tinker Board has to fit into 32 KiB. Currently this limit
> is exceeded.
>
> CONFIG_SPL_I2C_SUPPORT is not needed to move to main U-Boot. So let's
> disable it.
>
> Suggested-by: David Wu
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: David Wu
> ---
> This solves only on
> At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command
> values. These are pretty generic names. Add a 'C' suffix to avoid possible
> conflicts.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v2: None
>
> cmd/gpio.c | 37 +
> At present this function uses printf() format strings that are not
> supported in SPL, so the output just consists of %llx strings on 64-bit.
> machines. Fix this by adding a special case.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v2: None
>
> lib/di
> It is helpful to print the clock number as well as the index, so that this
> can be looked up in the binding file. Update the debug() statement to do
> this.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v2: None
>
> drivers/clk/clk-uclass.c | 4 ++--
>
On 4/18/19 2:30 PM, Vabhav Sharma wrote:
> Hello Maintainers,
> A gentle reminder to merge the changes.
Next time, use
$ ./scripts/get_maintainer.pl -f drivers/serial/serial_lpuart.c
and actually CC the maintainers.
> Regards,
> Vabhav
>
>> -Original Message-
>> From: Vabhav Sharma
>> Se
On Sat, Feb 2, 2019 at 9:05 AM Tom Rini wrote:
>
> On Fri, Jan 18, 2019 at 12:53:41PM +0530, Jagan Teki wrote:
>
> > Add u-boot.itb BUILD_TARGET for Rockchip platform when SPL_LOAD_FIT
> > is being used. This can get rid of building itb explicitly with
> > 'make u-boot.itb' all required images wil
El 12/4/19 a las 09:52, Jagan Teki escribió:
This would Migrate DM_MMC, DM_SCSI for A20 and R40 platforms.
Note:
- a20-wits-pro-a20-dkt change would need to send Linux first
- BPI-M2-Berry would break, but will import Linux dts once approved.
Andre Przywara (1):
sunxi: update SATA driver to
Sebastian
>> Gesendet: Freitag, 12. April 2019 14:32
>> An: u-boot@lists.denx.de
>> Betreff: [U-Boot] U-Boot API example doesn't support 64-bit
>>
>> Hello,
>>
>> I'd like to use the U-Boot external API with an ARM64 SoC.
>> If I ena
Hello again,
can nobody help to solve this problem?
Any help would be very appreciated.
Thanks.
Sebastian
> -Ursprüngliche Nachricht-
> Von: U-Boot Im Auftrag von Priebe,
> Sebastian
> Gesendet: Freitag, 12. April 2019 14:32
> An: u-boot@lists.denx.de
> Betreff: [
On 4/12/19 12:27 PM, Tom Rini wrote:
> On Thu, Feb 21, 2019 at 04:35:05PM -0600, Andrew F. Davis wrote:
>
>> Hello all,
>>
>> This series brings up HS device support on the AM65x platform. Support
>> for HS on K3 family devices is a bit different than previous devices
>> but for the most part all
On Fri, Mar 08, 2019 at 11:47:35AM +0530, Lokesh Vutla wrote:
> Create a ft_board_setup() api that gets called as part of
> DT fixup before jumping to kernel. In this ft_board_setup()
> call fdt_fixup_msmc_ram that update msmc sram node.
>
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master,
On Mon, Mar 18, 2019 at 01:54:35PM +0530, Faiz Abbas wrote:
> The ofdata_to_platdata function should not be called if OF_CONTROL is
> not enabled because fdtdec_* calls will fail. Block the function with
> OF_CONTROL
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Mar 18, 2019 at 01:54:41PM +0530, Faiz Abbas wrote:
> With DM_ETH enabled in am335x devices, remove all the unused
> non-DM code.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Mar 18, 2019 at 01:54:36PM +0530, Faiz Abbas wrote:
> Add DM_FLAG_PRE_RELOC to make the driver probe in SPL.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Mar 08, 2019 at 11:47:34AM +0530, Lokesh Vutla wrote:
> Certain parts of msmc sram can be used by DMSC or can be
> marked as L3 cache. Since the available size can vary, changing
> DT every time the size varies might be painful. So, query this
> information using TISCI cmd and fixup the DT
On Mon, Mar 18, 2019 at 01:54:38PM +0530, Faiz Abbas wrote:
> Make some room in SPL by getting rid of unnecessary configs.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
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On Thu, Feb 21, 2019 at 12:02:06PM -0500, Murali Karicheri wrote:
> Enable ti phy dp83867 for k2g
>
> Signed-off-by: Murali Karicheri
> Reviewed-by: Tom Rini
> Acked-by: Joe Hershberger
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Feb 27, 2019 at 01:29:38PM +0530, Faiz Abbas wrote:
> Now that NAND is supported on DRA71x include various NAND environment
> settings
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
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On Fri, Apr 05, 2019 at 02:18:46PM +0530, Faiz Abbas wrote:
> Pbias voltage should match the IO voltage set for the SD card. With the
> latest pbias change to 3.3V, update the capabilities and IO voltages
> settings to 3.3V.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
T
On Mon, Feb 25, 2019 at 09:53:46PM -0600, Adam Ford wrote:
> In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
> larger. This patch relocates BSS to SDRAM instead of SRAM which
> is similar to how ARMv7 boards (like OMAP2+) do it.
>
> This means two new variables are required:
> C
On Fri, Mar 08, 2019 at 11:47:33AM +0530, Lokesh Vutla wrote:
> Create a wrapper to get the ti sci handle.
>
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
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On Thu, Feb 21, 2019 at 12:02:05PM -0500, Murali Karicheri wrote:
> This patch removes the unused phy-mode property from the phy dt node. On
> K2G, currently link-interface determines if phy is used or not and is
> already set to use rgmii. So this is not needed. Besides phy-mode should
> be added
On Mon, Mar 18, 2019 at 01:54:31PM +0530, Faiz Abbas wrote:
> Add a priv member for eth_pdata for platform specific platform data.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Mar 18, 2019 at 01:54:34PM +0530, Faiz Abbas wrote:
> ti_cm_get_macid() is used to get a syscon node from the dt, read the
> efuse address and then assign the macid read from the address. Divide
> these two steps into separate functions one of which can be called from
> ofdata_to_platdata(
On Thu, Feb 21, 2019 at 12:02:01PM -0500, Murali Karicheri wrote:
> This add pinmux configuration for rgmii interface so that network
> driver can be supported on K2G ICE boards. The pinmux configurations
> for this are generated using the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/defau
On Mon, Mar 18, 2019 at 01:54:39PM +0530, Faiz Abbas wrote:
> Add Support for booting from Ethernet.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
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On Fri, Mar 08, 2019 at 11:47:36AM +0530, Lokesh Vutla wrote:
> Enable CONFIG_OF_BOARD_SETUP so that msmc sram dt nodes
> are updated correctly.
>
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Apr 05, 2019 at 02:18:44PM +0530, Faiz Abbas wrote:
> As per recent TRM[1], PBIAS cell on dra7 devices supports
> 3.3v and not 3.0v as documented earlier.
>
> Update PBIAS regulator max voltage and the voltage written
> in the driver to reflect this.
>
> [1] http://www.ti.com/lit/pdf/spr
On Mon, Mar 18, 2019 at 01:54:40PM +0530, Faiz Abbas wrote:
> Update VCI string to keep it compatible with legacy test setups.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Mar 18, 2019 at 01:54:32PM +0530, Faiz Abbas wrote:
> cpsw_phy_sel() is a configuration step that should not be in
> ofdata_to_platdata(). Add phy_sel_compat to the cpsw_platform_data
> structure so that it is accessible in _probe. Then move the call of
> cpsw_phy_sel() to _probe.
>
> Sig
On Mon, Mar 18, 2019 at 01:54:37PM +0530, Faiz Abbas wrote:
> The SPL image overflows when cpsw dt nodes are added and SPL_OF_CONTROL
> is enabled. Use static platdata instead to save space.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Feb 27, 2019 at 01:29:36PM +0530, Faiz Abbas wrote:
> From: Franklin S Cooper Jr
>
> If SW 8 pins 0 and 1 indicate that NAND should be enabled then
> the pins pinmux must be reconfigured for NAND mode.
>
> Therefore, enable NAND by reconfiguring the pinmux.
>
> Signed-off-by: Franklin
On Thu, Feb 21, 2019 at 12:02:03PM -0500, Murali Karicheri wrote:
> Enhance the netcp driver to support phys that can be configured
> for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
>
> Signed-off-by: Murali Karicheri
> Acked-by: Joe Hershberger
Applied to u-boot/master, thanks!
--
Tom
On Thu, Feb 21, 2019 at 12:02:04PM -0500, Murali Karicheri wrote:
> This patch adds a workaround to reset the phy one time during boot
> using GPIO0 pin 10 to make sure, the Phy latches the configuration
> from the input pins correctly.
>
> Signed-off-by: Murali Karicheri
> Acked-by: Joe Hershbe
On Wed, Feb 27, 2019 at 01:29:37PM +0530, Faiz Abbas wrote:
> Add NAND support to dra71x-evm defconfig
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
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On Tue, Feb 12, 2019 at 02:28:11PM +0530, Faiz Abbas wrote:
> Add an API to continuously read a register until a condition is
> satisfied or a timeout occurs.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Feb 25, 2019 at 03:32:59PM +, Martyn Welch wrote:
> When booting using an SPL on am335x, if we want to support booting with
> the boot ROM loader via USB (which uses RNDIS, making bootp and tftp
> calls) we need to enable gadget eth in the SPL to load the main U-Boot
> image. To enable
On Fri, Mar 08, 2019 at 11:47:32AM +0530, Lokesh Vutla wrote:
> DMSC can use certain amount of msmc memory available in the
> system. Also certain part of msmc memory can be marked as L3
> cache using board config. But users might not know what size
> is being used and the remaining available msmc
On Mon, Mar 18, 2019 at 01:54:33PM +0530, Faiz Abbas wrote:
> Convert cpsw_platform_data to a pointer in cpsw_priv. Allocate it
> dynamically and assign it as a part of eth_pdata. This helps in
> isolating platform data handling and implementing platdata for SPL
> in a board file.
>
> Signed-off-
On Tue, Feb 12, 2019 at 02:28:18PM +0530, Faiz Abbas wrote:
> From: Faiz Abbas
>
> The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
> to arasan/zynq controllers. Add the same to sdhci.h.
>
> Also create a common API to set UHS timings in HOST_CONTROL2.
>
> Signed-off-by
On Wed, Feb 27, 2019 at 01:29:35PM +0530, Faiz Abbas wrote:
> From: Franklin S Cooper Jr
>
> By default VOUT3 occupies the pins required for NAND. Therefore, create
> a seperate entry that can be use to reconfigure these pins to work for
> NAND.
>
> On the EVM SWITCH 8 pins 0 and 1 will be used
On Tue, Feb 12, 2019 at 02:28:17PM +0530, Faiz Abbas wrote:
> Add Support for CONFIG_REGMAP.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
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On Tue, Mar 19, 2019 at 07:14:37AM -0400, Tom Rini wrote:
> The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
> notion but rather "where is our previous stage loaded in memory?"
> option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
> our HS builds that ar
On Mon, Feb 25, 2019 at 09:53:47PM -0600, Adam Ford wrote:
> With the memory mapping giving us some more avialable RAM, this
> updates the da850-evm-u-boot.dtsi to include the serial port, SPI
> and Flash nodes along with some dependent nodes in the SPL dtb.
> This also removes the platform data i
On Tue, Feb 12, 2019 at 02:28:16PM +0530, Faiz Abbas wrote:
> Add support in the driver for handling phy specific registers.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
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On Thu, Feb 21, 2019 at 12:02:02PM -0500, Murali Karicheri wrote:
> This patch updates pinmux configuration for K2G GP EVM based on
> data generated by the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/default
>
> Signed-off-by: Murali Karicheri
> Reviewed-by: Lokesh Vutla
Applied to u-
On Fri, Apr 05, 2019 at 02:18:45PM +0530, Faiz Abbas wrote:
> Correct vpo_sd_1v8_3v3 regulator max voltage to 3.3V
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Keerthy
Applied to u-boot/master, thanks!
--
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On Tue, Feb 12, 2019 at 02:28:12PM +0530, Faiz Abbas wrote:
> Add Support for masking some bits in the capabilities
> register of a host controller.
>
> Also remove the redundant readl() into caps1.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
T
On Tue, Feb 12, 2019 at 02:28:10PM +0530, Faiz Abbas wrote:
> In device nodes with more than one entry in the reg property,
> it is sometimes useful to regmap only of the entries. Add an
> API regmap_init_mem_index() to facilitate this.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
App
On Tue, Feb 12, 2019 at 02:28:19PM +0530, Faiz Abbas wrote:
> From: Faiz Abbas
>
> Add a platform specific set_control_reg() callback to help switch to
> UHS speed modes.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Thu, Feb 21, 2019 at 12:02:07PM -0500, Murali Karicheri wrote:
> This patch adds dt node for DP83867 phy used on K2G ICE board and
> also enable netcp device nodes for the board.
>
> EVM hardware spec recommends to add 0.25 nsec delay in the tx
> direction and 2.25 nsec delay in the rx directi
On Tue, Feb 12, 2019 at 02:28:13PM +0530, Faiz Abbas wrote:
> The am654_sdhci driver needs to switch the clock off
> before disabling its phy dll and needs to re-enable
> the clock before enabling the phy again.
>
> Therefore, make the sdhci_set_clock() function accessible
> in the am654_sdhci dr
On Tue, Feb 12, 2019 at 02:28:15PM +0530, Faiz Abbas wrote:
> Make set_ios_post() return int to faciliate error handling in
> platform drivers.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Feb 12, 2019 at 02:28:12PM +0530, Faiz Abbas wrote:
> Add Support for masking some bits in the capabilities
> register of a host controller.
>
> Also remove the redundant readl() into caps1.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
T
On Tue, Feb 12, 2019 at 02:28:09PM +0530, Faiz Abbas wrote:
> The host controller works perfectly well without having to add any
> quirks. Remove them.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Feb 25, 2019 at 03:32:58PM +, Martyn Welch wrote:
> From: Sjoerd Simons
>
> Add configuration for the MT41K128M16JT125K memory modules as used on the
> Bosch Guardian device.
>
> Based on a patch by:
> Govindaraji Sivanantham
>
> Signed-off-by: Sjoerd Simons
> [checkpatch.pl
On Tue, Feb 12, 2019 at 02:28:14PM +0530, Faiz Abbas wrote:
> With changes in the driver requiring phy related properties,
> add the same for the SD card node to prevent breaking boot with
> the driver update.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master, than
On Tue, Feb 12, 2019 at 02:28:07PM +0530, Faiz Abbas wrote:
> Sync the sdhci0 node from kernel. This changes the compatible that is
> required to be there in the driver. Change the same for the SD card node
> which is not yet supported in kernel.
>
> Also sync the main_pmx0 node as a side effect.
On Tue, Feb 12, 2019 at 02:28:08PM +0530, Faiz Abbas wrote:
> This driver works with the sdhci controller present on TI's AM65x devices.
> Change the name to make this clearer and match the compatible with
> kernel.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
Applied to u-boot/master
On Mon, Feb 25, 2019 at 03:33:00PM +, Martyn Welch wrote:
> From: Sjoerd Simons
>
> Add support for the Bosch Guardian board.
>
> CPU : AM335X-GP rev 2.1
> Model: Bosch AM335x Guardian
> I2C: ready
> DRAM: 256 MiB
> NAND: 512 MiB
> MMC: OMAP SD/MMC: 0
>
> Signed-off-by: Sjoerd Simon
On Tue, Feb 05, 2019 at 05:31:25PM +0530, Vignesh R wrote:
> Merge drivers/soc/keystone/ into drivers/soc/ti/
> and convert CONFIG_TI_KEYSTONE_SERDES into Kconfig.
>
> Signed-off-by: Vignesh R
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Feb 05, 2019 at 05:31:22PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
> enable straightforward passing of work between a producer and a consumer.
> There is one RINGACC module per NAVSS on TI AM65x SoCs.
>
On Tue, Feb 05, 2019 at 05:31:24PM +0530, Vignesh R wrote:
> The UDMA-P is intended to perform similar (but significantly upgraded)
> functions
> as the packet-oriented DMA used on previous SoC devices. The UDMA-P module
> supports the transmission and reception of various packet types.
> The UDM
On Tue, Feb 05, 2019 at 05:31:26PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Add DT node for MCU NAVSS its components to get DMA working on AM654
> SoC.
>
> Signed-off-by: Grygorii Strashko
> Signed-off-by: Vignesh R
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
On Tue, Feb 05, 2019 at 05:31:27PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Enable TI K3 AM65x PSI-L, Ring Accelerator and UDMA drivers
>
> Signed-off-by: Grygorii Strashko
> Signed-off-by: Vignesh R
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Feb 05, 2019 at 05:31:23PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Add TI Communications Port Programming Interface (CPPI) 5
> interface description and helpers
>
> Signed-off-by: Grygorii Strashko
> Signed-off-by: Vignesh R
> Reviewed-by: Tom Rini
Applied to u-boot/ma
On Tue, Feb 05, 2019 at 05:31:21PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Texas Instruments' System Control Interface (TI-SCI) Message Protocol
> abstracts management of NAVSS resources, like PSI-L pairing and
> unpairing, UDMAP tx/rx/flow configuration and Rings.
>
> This patch
On Thu, Feb 21, 2019 at 04:35:05PM -0600, Andrew F. Davis wrote:
> Hello all,
>
> This series brings up HS device support on the AM65x platform. Support
> for HS on K3 family devices is a bit different than previous devices
> but for the most part all that has been abstracted into the SECDEV
> pa
Hello,
I'd like to use the U-Boot external API with an ARM64 SoC.
If I enable CONFIG_API I get the following build error for the API example:
examples/api/crt0.S: Assembler messages:
examples/api/crt0.S:33: Error: operand 1 should be an integer register -- `ldr
ip,=search_hint'
examples/api/crt0.
On Fri, Apr 12, 2019 at 12:21:23PM +, Raghavendra, Vignesh wrote:
>
> On Mon, Feb 11, 2019 at 02:35:35PM +0530, Vignesh R wrote:
>
> > Now that all boards using TI QSPI have moved to DM and DT, drop non DM
> > code completely.
> >
> > Signed-off-by: Vignesh R
> > Reviewed-by: Tom Rini
> >
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