> > > > > > Are you saying that if doing cpu_mhz_from_cpuid() you can't get > > > > > > correct frequency? Can you investigate why your core crystal clock > > is > > > > > > always zero? > > > > > > > > > > Yes, this has to be investigated. > > > > > > > > > > > Can we do it something like VLV2? > > > > > > > > > > Please, don't. I see no evidence in the latest Linux kernel sources > > > > > that Apollo Lake has such issue as Intel MID family of Atom SoCs. > > > > > > > > Sorry, I slipped one code in my consideration, i.e. > > > > > > > > unsigned long native_calibrate_tsc(void) > > > > { > > > > ... > > > > if (crystal_khz == 0) { > > > > switch (boot_cpu_data.x86_model) { > > > > ... > > > > case INTEL_FAM6_ATOM_GOLDMONT: > > > > crystal_khz = 19200; /* 19.2 MHz */ > > > > break; > > > > } > > > > ... > > > > if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT) > > > > setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); > > > > ... > > > > } > > > > > > > > So, that's what we need to do in U-boot. > > > > > > > > > > Thanks for the investigation. Could you please send a proper patch? > > do you want to take charge of this? > > Otherwise I will post patch V2. > > I'm busy with something else, so, if you don't mind, please, consider > v2 which takes into consideration my findings. Ok, as soon as I am done I will post v2.
-- Best Regards, Bernhard _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot