Hi,
In the end, it seems that the issue is neither MMC nor Normal/Secure
world related, but cache related. Between SPL and u-boot, I run a
small piece of secure software, which turns on the ACTLR.SMP bit.
According to cortex a7 TRM, this is mandatory to enable caching.
Setting the MMU is not
Hi,
I am having some issue with several instances of
ALLOC_CACHE_ALIGN_BUFFER in (at least):
- common/env_mmc: env_relocate_spec
- disk/part_dos: test_part_dos
U-boot (ls1021atwr) is build in SPL mode, SPL part is in Secure World,
u-boot is in Normal World.
In the SPL part, there is no problem,
2 matches
Mail list logo