Hi Lukasz,
On Thu, 6 Dec 2018 at 01:50, Lukasz Majewski wrote:
>
> Hi Simon,
>
> > Hi Lukasz,
> >
> > On Mon, 3 Dec 2018 at 15:13, Lukasz Majewski wrote:
> > >
> > > Dear All,
> > >
> > > I've stumbled upon a following issue:
> > >
> > > - I do have a vybrid SoC which is not using SPL. It only u
Hi Simon,
> Hi Lukasz,
>
> On Mon, 3 Dec 2018 at 15:13, Lukasz Majewski wrote:
> >
> > Dear All,
> >
> > I've stumbled upon a following issue:
> >
> > - I do have a vybrid SoC which is not using SPL. It only uses U-boot
> > proper (u-boot.vyb).
> >
> > - In the board_early_init_f() (when we ar
Hi Lukasz,
On Mon, 3 Dec 2018 at 15:13, Lukasz Majewski wrote:
>
> Dear All,
>
> I've stumbled upon a following issue:
>
> - I do have a vybrid SoC which is not using SPL. It only uses U-boot
> proper (u-boot.vyb).
>
> - In the board_early_init_f() (when we are still in SRAM) I do perform
> p
Dear All,
I've stumbled upon a following issue:
- I do have a vybrid SoC which is not using SPL. It only uses U-boot
proper (u-boot.vyb).
- In the board_early_init_f() (when we are still in SRAM) I do perform
pinctrl (pinmux) setup for UART1 (this is the console device).
- I also do use uca
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