RE: [v4 06/12] arm: dts: aspeed: Update SPI flash node settings

2022-07-03 Thread Chin-Ting Kuo
de; p.ya...@ti.com; Joel Stanley > Subject: Re: [v4 06/12] arm: dts: aspeed: Update SPI flash node settings > > On 5/24/22 07:56, Chin-Ting Kuo wrote: > > For both AST2500 and AST2600, there are three SPI controllers, > > FMC(Firmware Memory Controller), > > SPI1 and SPI

Re: [v4 06/12] arm: dts: aspeed: Update SPI flash node settings

2022-07-01 Thread Cédric Le Goater
On 5/24/22 07:56, Chin-Ting Kuo wrote: For both AST2500 and AST2600, there are three SPI controllers, FMC(Firmware Memory Controller), SPI1 and SPI2. The clock source is HCLK. Following is the basic information for ASPEED SPI controller. AST2500: - FMC: CS number: 3 controller r

[v4 06/12] arm: dts: aspeed: Update SPI flash node settings

2022-05-23 Thread Chin-Ting Kuo
For both AST2500 and AST2600, there are three SPI controllers, FMC(Firmware Memory Controller), SPI1 and SPI2. The clock source is HCLK. Following is the basic information for ASPEED SPI controller. AST2500: - FMC: CS number: 3 controller reg: 0x1e62 - 0x1e62 decoded ad