On 8/31/23 04:21, Chanho Park wrote:
On 8/16/23 08:54, Chanho Park wrote:
This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
CONFIG_SPL_FPGA is not enabled.
I would rewrite this because the connection to SPL_FPGA is just one part
of it.
It is also taken when CONFIG_FPGA
> On 8/16/23 08:54, Chanho Park wrote:
> > This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
> > CONFIG_SPL_FPGA is not enabled.
>
> I would rewrite this because the connection to SPL_FPGA is just one part
> of it.
> It is also taken when CONFIG_FPGA is not enabled.
Sure.
On 8/16/23 08:54, Chanho Park wrote:
This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
CONFIG_SPL_FPGA is not enabled.
I would rewrite this because the connection to SPL_FPGA is just one part of it.
It is also taken when CONFIG_FPGA is not enabled.
Hi,
On 8/28/23 12:00, Chanho Park wrote:
Hi,
-Original Message-
From: Eugen Hristev
Sent: Monday, August 28, 2023 5:47 PM
To: Chanho Park ; 'Michal Simek'
; u-boot@lists.denx.de
Cc: Simon Glass
Subject: Re: [PATCH] fpga: define dummy fpga_load function for debug build
On 8/28/23 03
Hi,
> -Original Message-
> From: Eugen Hristev
> Sent: Monday, August 28, 2023 5:47 PM
> To: Chanho Park ; 'Michal Simek'
> ; u-boot@lists.denx.de
> Cc: Simon Glass
> Subject: Re: [PATCH] fpga: define dummy fpga_load function for debug build
>
> On 8/28/
On 8/28/23 03:21, Chanho Park wrote:
Hi,
-Original Message-
From: Michal Simek
Sent: Friday, August 25, 2023 4:23 PM
To: Chanho Park ; u-boot@lists.denx.de
Subject: Re: [PATCH] fpga: define dummy fpga_load function for debug build
Hi,
On 8/16/23 08:54, Chanho Park wrote:
This fixes
Hi,
> -Original Message-
> From: Michal Simek
> Sent: Friday, August 25, 2023 4:23 PM
> To: Chanho Park ; u-boot@lists.denx.de
> Subject: Re: [PATCH] fpga: define dummy fpga_load function for debug build
>
> Hi,
>
> On 8/16/23 08:54, Chanho Park wrote:
>
Hi,
On 8/16/23 08:54, Chanho Park wrote:
This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
CONFIG_SPL_FPGA is not enabled.
../common/spl/spl_fit.c:591: undefined reference to `fpga_load'
collect2: error: ld returned 1 exit status
Signed-off-by: Chanho Park
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