> -----Original Message----- > From: Marek Vasut <ma...@denx.de> > Sent: Tuesday, 14 September, 2021 11:26 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut <ma...@denx.de>; Lim, Elly Siew Chin > <elly.siew.chin....@intel.com>; Simon Goldschmidt > <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong > <tien.fong.c...@intel.com> > Subject: [PATCH 8/8] arm: socfpga: vining: Let DWMAC configure PHY reset > GPIO > > The DM DWMAC driver is perfectly capable of configuring the ethernet PHY > reset GPIO, let the driver do it instead of doing it in the board file. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Siew Chin Lim <elly.siew.chin....@intel.com> > Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> > Cc: Tien Fong Chee <tien.fong.c...@intel.com> > --- > board/softing/vining_fpga/socfpga.c | 7 ------- > 1 file changed, 7 deletions(-) >
Reviewed-by: Tien Fong Chee <tien.fong.c...@intel.com> Regards, TF
