On Fri, 1 Feb 2019, Chris Spencer wrote:
On Fri, 1 Feb 2019 at 16:10, Sergey Kubushyn wrote:
Turns out there's already a patch to add the driver as part of the
i.MX8MM patch series. [1] Go figure.
What the fcuk is i.MX8MM? Are they going to do anything with their i.MX8MQ
documentation? It
On Fri, 1 Feb 2019 at 16:10, Sergey Kubushyn wrote:
> > Turns out there's already a patch to add the driver as part of the
> > i.MX8MM patch series. [1] Go figure.
>
> What the fcuk is i.MX8MM? Are they going to do anything with their i.MX8MQ
> documentation? It is currently at Rev.0 dated
On Fri, 1 Feb 2019, Chris Spencer wrote:
On Thu, 31 Jan 2019 at 18:43, Sergey Kubushyn wrote:
OK, it worked. The second patch is irrelevant for me because I'm working on
a custom device, not MCIMX8M-EVK (I don't have that, just using its
schematic from time to time as reference to its drivers
On Thu, 31 Jan 2019 at 18:43, Sergey Kubushyn wrote:
> OK, it worked. The second patch is irrelevant for me because I'm working on
> a custom device, not MCIMX8M-EVK (I don't have that, just using its
> schematic from time to time as reference to its drivers and such) and I
> _DID_ have
On Thu, 31 Jan 2019, Chris Spencer wrote:
On Wed, 30 Jan 2019 at 00:44, Sergey Kubushyn wrote:
OK, I've got it working. The problem was DM FEC driver does _NOT_ do pin
muxing and FEC pins in i.MX8MQ come up as GPIOs after rest so no wonder it
can't talk to the PHY or whatever else.
I don't
On Wed, 30 Jan 2019 at 00:44, Sergey Kubushyn wrote:
> OK, I've got it working. The problem was DM FEC driver does _NOT_ do pin
> muxing and FEC pins in i.MX8MQ come up as GPIOs after rest so no wonder it
> can't talk to the PHY or whatever else.
>
> I don't know yet if there is some setting that
On Sat, 26 Jan 2019, Chris Spencer wrote:
On Sat, 26 Jan 2019 at 01:14, Sergey Kubushyn wrote:
Thanks for a reply. The problem here is not with leftover descriptors -- it
is MDIO bus not working at all. It is either bogus speed/clock in DM mode or
something else that I haven't found yet.
On Sat, 26 Jan 2019 at 01:14, Sergey Kubushyn wrote:
> Thanks for a reply. The problem here is not with leftover descriptors -- it
> is MDIO bus not working at all. It is either bogus speed/clock in DM mode or
> something else that I haven't found yet. Reading all zeroes means there is
> no
On Fri, 25 Jan 2019, Chris Spencer wrote:
Thanks for a reply. The problem here is not with leftover descriptors -- it
is MDIO bus not working at all. It is either bogus speed/clock in DM mode or
something else that I haven't found yet. Reading all zeroes means there is
no communication with the
On Thu, 24 Jan 2019 at 23:51, Sergey Kubushyn wrote:
> On Fri, 4 Jan 2019, Chris Spencer wrote:
> Hi Chris,
>
> Did you figure out what was wrong with the PHY always reading zeroes over
> MDIO?
>
> I have exactly same problem here with out i.MX8MQ-based device -- it worked
> just fine with older
On Fri, 4 Jan 2019 at 15:33, Chris Spencer wrote:
>
> On Thu, 3 Jan 2019 at 12:53, Chris Spencer wrote:
> > Hi,
> >
> > I'm trying to get the i.MX8MQ-EVK board up and running with the
> > recently added kernel support (I'm currently working off
> > arm-soc/for-next) and am having some trouble
On Thu, 3 Jan 2019 at 12:53, Chris Spencer wrote:
> Hi,
>
> I'm trying to get the i.MX8MQ-EVK board up and running with the
> recently added kernel support (I'm currently working off
> arm-soc/for-next) and am having some trouble with the networking. If I
> issue a ping from my test machine with
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