The MPC83xx DM timer driver disables arch.pciexp*_clk, and uses
clk_get_rate instead. But the legacy MPC83xx PCIe driver still uses
arch.pciexp*_clk for the clock.
Hence, read the PCIe clock from the registers in the legacy MPC83xx PCIe
driver.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
CONFIG_SYS_CLK_FREQ is the standard way to set the system clock
frequency. On MPC83xx, CONFIG_83XX_CLKIN is used for this purpose.
Hence, the obvious way is to replace CONFIG_83XX_CLKIN with
CONFIG_SYS_CLK_FREQ.
A few MPC83xx boards use the CONFIG_83XX_CLKIN variable for computing
CONFIG_SYS_NS165
CONFIG_MPC8315ERDB is unused, and TARGET_MPC8315ERDB could replace it.
Hence, get rid of CONFIG_MPC8315ERDB.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
* Removed config option from whitelist
---
include/configs/MPC8315ERDB.h | 1 -
scripts/config_whitelist.txt | 1 -
2 fil
Migrate the CONFIG_HIGH_BATS variable to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
* Removed config option from whitelist
---
arch/powerpc/Kconfig | 6 ++
configs/MPC8313ERDB_33_defconfig | 1 +
configs/MPC8313ERDB_66_defconfig | 1 +
We want to normalize all BR/OR config lines as much as possible.
The TQM834x board uses CONFIG_SYS_OR_TIMING_FLASH in a OR definition,
which we want to remove. But CONFIG_SYS_OR_TIMING_FLASH is also used
outside of the config file.
Replace these usages with the definition of the variable, so we c
Hi Stefan,
> This patch series converts PCM052 and BK4 to use Driver Model and
> Device Tree.
>
> Some notable changes:
> - The way how MAC address is read from fuses can now be adjusted
> - DTS improvement/sync with kernel (also extract u-boot specific
> properties)
> - Using generic code instea
All BR/OR option lines should have the same layout to make them easier
to migrate to Kconfig. This includes using the same option macros
everywhere.
The normalize the lines,
* replace function macros with their results, and
* replace hardcoded hex values with standard macros
Signed-off-by: Mario
The HRCW (hardware reset configuration word) is a constant that must be
hard-coded into the boot loader image. So, it must be available at
compile time, and cannot be migrated to the DT mechanism, but has to be
kept in Kconfig.
Configuration of this crucial variable should still be somewhat
comfor
The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
Migrate the CONFIG_LCRR_* settings to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/cpu_init.c | 22 ---
arch/powerpc/cpu/mpc83xx/initreg/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/initreg/Kconfig.lcrr | 139 +++
The MPC8349EMDS configuration was the basis for the sbc8349, so it also
contains its SDRAM option.
Since
* the SDRAM has to be soldered onto the board,
* the sbc8349 never used the support, and
* the support never worked (see previous patch fixing it),
we can assume that the support on the sbc834
Except for one counter example, CONFIG_SYS_LBC_LBCR always has a value
of either 0x0004 or 0x.
CONFIG_SYS_LBC_MRTPR always has the value 0x2000.
CONFIG_SYS_LBC_LSDMR_{1,2,4,5} are not set for any mpc83xx board.
CONFIG_SYS_LBC_LSRT is set by one board (to 0x3200).
To simplify
Migrate the system IO configuration setting to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/cpu_init.c | 1 +
arch/powerpc/cpu/mpc83xx/sysio/Kconfig| 7
Re-format all BR,OR #define lines into single lines. This makes them
harder to read, but accessible to semi-automatic replacement.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
No changes
---
include/configs/MPC8308RDB.h| 46 ---
include/configs/MPC8313E
DM serial drivers on PowerPC determine their clock frequency via the
get_serial_clock function. This function is not Implemented yet for
MPC83xx.
This patch Implements the function so that DM serial drivers work on
MPC83xx.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
The MPC85xx GPIO driver was converted to handle a broader range of SoCs.
Prepare the MPC83xx code for usage of this driver.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 8
1 file changed, 8 insertions(+)
d
Migrate the arbiter configuration to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/arbiter/Kconfig | 139 +
arch/powerpc/cpu/mpc83xx/arbiter/arbiter.h | 28
Migrate the SPCR setting to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/cpu_init.c | 29 +
arch/powerpc/cpu/mpc83xx/initreg/Kconfig | 5 +
arch/powerpc
CONFIG_SYS_DDR_BASE is specific to mpc83xx an is always set to the same
value as CONFIG_SYS_SDRAM_BASE. Just use CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
board/esd/vme8349/vme8349.c | 2 +-
board/freescale/mpc8323e
Replace the hard-coded CONFIG_SYS_NS16550_CLK value for the FDT fixup
with the previously introduced get_serial_clock function
This will make it possible to activate DM for serial devices on MPC83xx
later on.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/pow
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 2 +-
board/freescale/mpc8308rdb/s
The MPC8308 has two I2C controllers, but no PCI controller.
Fix the register map layout for this SoC.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Makefile | 2 ++
arch/powerpc/include/asm/immap_83xx.h | 42 +
The fsl-esdhc driver can be used for the SDHC functionality on MPC83xx,
but it needs some additional definitions.
Add a clock.h file, so we can use the driver for MPC83xx.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/include/asm/arch-mpc83xx/clock.h
Remove the last instances of the CONFIG_MPC83xx symbol.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
include/configs/hrcon.h | 1 -
include/configs/strider.h | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
CONFIG_SYS_APP1_BASE, CONFIG_SYS_APP2_BASE, CONFIG_SYS_APP1_SIZE, and
CONFIG_SYS_APP2_SIZE are no longer used in the keymile config files
(they were used for setting values, which were converted to Kconfig
earlier in the series).
Remove them from the configs and the whitelist.
Signed-off-by: Mari
Migrate CONFIG_SYS_IMMR to Kconfig for MPC83xx.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Kconfig| 7 +++
configs/TQM834x_defconfig | 1 +
configs/ids8313_defconfig | 1 +
include/configs/MPC8308RDB.h
Hi,
>>> Testing with A10 Gemei G9 Tablet, FEL mode is broken:
>>>
>>> a) With usb-boot via fel:
>>>
>>> I get following error/warning:
>>> Loading Environment from FAT... Card did not respond to voltage select!
>>>
>>> => mmc list
>>> mmc@1c0f000: 0
>>> ### All commands below stalls for a b
Don't use the legacy method of initializing the ethernet controller on
MPC83xx when DM is active.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/ar
Mirate the HID configuration settings to Kconfig.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/Kconfig | 1 +
arch/powerpc/cpu/mpc83xx/hid/Kconfig | 565 ++
arch/powerpc/cpu/mpc83xx/hid/hid.h| 72
For a lot of inline assembly calls in the mpc8xxx and mpc83xx
directories, we already have convenient pre-defined helper functions,
but they're not used, resulting in hard-to-read code.
Use these helper functions where ever possible and useful.
Signed-off-by: Mario Six
---
v2 -> v3:
No changes
ppcDWstore/ppcDWload are hardly used by any board, but since they're
implemented in start.S, they're always present in every U-Boot image,
even if they're not needed.
Re-implement these fuctions in C with inline assembly, so that the
compiler can decide when to actually include them.
Signed-off-b
Hi Simon,
Am 20.01.2019 um 21:23 schrieb Simon Glass:
Hi Simon,
On Tue, 8 Jan 2019 at 08:29, Simon Goldschmidt
wrote:
The platdata initialization structs are currently generated into .rwdata.
Make sure the are put into .rodata by generating them as const.
Signed-off-by: Simon Goldschmidt
The dtoc tests need to be adapted to dtoc being changed to output platdata
structs as const, which has been introduced in commit 7d05d3a8e35f ("dtoc:
make generated platdata structs const").
Fixes: 7d05d3a8e35f ("dtoc: make generated platdata structs const")
Signed-off-by: Simon Goldschmidt
---
On Mon, Jan 21, 2019 at 08:51:10AM +, Andre Przywara wrote:
> Hi,
>
>
>
> >>> Testing with A10 Gemei G9 Tablet, FEL mode is broken:
> >>>
> >>> a) With usb-boot via fel:
> >>>
> >>> I get following error/warning:
> >>> Loading Environment from FAT... Card did not respond to voltage sele
Am 19.01.2019 um 14:28 schrieb Sam Protsenko:
Hi Simon,
On Fri, Jan 18, 2019 at 10:46 PM Simon Goldschmidt
wrote:
Am Fr., 18. Jan. 2019, 20:20 hat Sam Protsenko
geschrieben:
In case when the environment on some location is malformed (CRC isn't
matching), there is a chance we won't be ab
On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara wrote:
>
> This series enables the Allwinner MMC driver to drive all SoCs with its
> DM_MMC variant. We use the gates clock and reset support from the new
> clock driver, but keep the actual mod clock in its somewhat hackish
> state. Properly supporti
On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara wrote:
>
> The A80 handles resets and clock gates for the MMC devices differently,
> outside of the CCU IP block. Consequently we have a separate clock
> device with a separate binding for that.
>
> Implement that with the respective clock gates and r
On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki wrote:
>
> On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara wrote:
> >
> > The A80 handles resets and clock gates for the MMC devices differently,
> > outside of the CCU IP block. Consequently we have a separate clock
> > device with a separate binding for
On Mon, 21 Jan 2019 17:34:25 +0800
Chen-Yu Tsai wrote:
> On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> wrote:
> >
> > On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara
> > wrote:
> > >
> > > The A80 handles resets and clock gates for the MMC devices
> > > differently, outside of the CCU IP block.
On 20/01/2019 21:18, Joris Offouga wrote:
This patch imports the Linux kernel base board imx7d-pico.dtsi and specific
dts for imx7d-pico-pi
I recommend including the upstream Linux SHA in the commit log to make
it easier to validate against and also if any changes/bugfixes go in
upstream ma
Hello Tom,
Am 19.01.2019 um 03:54 schrieb Tom Rini:
On Fri, Jan 18, 2019 at 10:45:56AM +0100, Heiko Schocher wrote:
commit 9a9d66f5eff0 ("env: add spi_flash_read_env function")
breaks Environment functionality, as it reads only
until 2 \0 are found, but fills the buffer with 0x0
instead 0xff
On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara wrote:
>
> On Mon, 21 Jan 2019 17:34:25 +0800
> Chen-Yu Tsai wrote:
>
> > On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> > wrote:
> > >
> > > On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara
> > > wrote:
> > > >
> > > > The A80 handles resets and clock
Hi Tom,
On 01/19/2019 06:54 AM, Tom Rini wrote:
> Hey,
>
> So I was playing with how to make our linker scripts more re-usable
> and have the kinds of link error on excessive size checks that we find
> really useful to avoid introducing run time failures, and I found
> something. On rk3288 we do
On Mon, 21 Jan 2019 18:02:17 +0800
Chen-Yu Tsai wrote:
> On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara
> wrote:
> >
> > On Mon, 21 Jan 2019 17:34:25 +0800
> > Chen-Yu Tsai wrote:
> >
> > > On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> > > wrote:
> > > >
> > > > On Sat, Jan 19, 2019 at 7:02
Simon,
Thanks for you reply to this mail, and it's surprised that it's a
mail which is more than one years ago at Nov 2017 :)
I have implement re-use kernel dtb in my local branch in 2018, you
can see how I do it here[0] with USING_KERNEL_DTB macro if you have
interest for it.
I'm no
On 15.01.19 12:50, Vladimir Vid wrote:
This adds initial support for micro-DPU (uDPU) board which is based on
Armada-3720 SoC.
micro-DPU is the single-port FTTdp "distribution point unit" made by Methode
Electronics
which offers complete modularity with replaceable SFP modules both for uplink
On Mon, Jan 21, 2019 at 6:12 PM Andre Przywara wrote:
>
> On Mon, 21 Jan 2019 18:02:17 +0800
> Chen-Yu Tsai wrote:
>
> > On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara
> > wrote:
> > >
> > > On Mon, 21 Jan 2019 17:34:25 +0800
> > > Chen-Yu Tsai wrote:
> > >
> > > > On Mon, Jan 21, 2019 at 5:32
From: Andre Przywara
Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.
We don't advertise the mod clock yet, as this is still handled by the
MMC driver.
Signed-off-by: Andre Przywara
[jagan: add V3S gates/resets, fix CLK_AHB1_MMC3
From: Andre Przywara
The A80 handles resets and clock gates for the MMC devices differently,
outside of the CCU IP block. Consequently we have a separate clock
device with a separate binding for that.
Implement that with the respective clock gates and resets to allow the
A80 taking part in the D
Environment and fastboot MMC devices are configured based number
of mmc slots defined on particular board in sunxi platform.
If number of slots are not more than 1, it assigns 0 which usually mmc
device on SD slot. With DM_MMC it is detected as 0 since mmc0 node always
be an mmc device.
If number
Added H5, A64 compatible for mmc and emmc.
Cc: Jaehoon Chung
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index ec4f227130..1259e627cc 100644
--- a/drivers/mmc/sunxi_mmc.c
+++
Now CLK and RESET driver for Allwinner SoC are available,
so add the relevant operations on mmc sunxi driver.
Cc: Jaehoon Chung
Signed-off-by: Jagan Teki
---
Changes for v3:
- Grab changes for ML
drivers/mmc/sunxi_mmc.c | 52 +
1 file changed, 47 inserti
Unlike other Allwinner SoC's, A80 comes with different ahb
gate clock offset values and also has mmc common controller.
So support them via driver data.
Cc: Rask Ingemann Lambertsen
Cc: Jaehoon Chung
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 8
1 file changed, 8 insertio
Compared to previous version changes[1] this version do manage
ahb clocks/resets via CLK framework.
This version created changes along with Andre patches to support
clock/resets[2]
Tested A64, SD, eMMC and respective changes available at
u-boot-sunxi/next
Changes for v3:
- Handle clock via CLK f
Add emmc compatible for A83T SoC.
Cc: Jaehoon Chung
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 302332bf97..ec4f227130 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc
Unlike other Allwinner SoC's, H6 comes with different
clock and reset control offset values. So support them
via driver data.
Cc: Jaehoon Chung
Signed-off-by: Jagan Teki
---
drivers/mmc/sunxi_mmc.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drive
Enable DM_MMC for all Allwinner SoCs, this will eventually
enable BLK.
Also removed DM_MMC enablement in few parts of sunxi
configurations.
Signed-off-by: Jagan Teki
---
arch/arm/Kconfig | 1 +
arch/arm/mach-sunxi/Kconfig | 1 -
configs/Linksprite_pcDuino3_defconf
Le 21/01/2019 à 10:52, Bryan O'Donoghue a écrit :
On 20/01/2019 21:18, Joris Offouga wrote:
This patch imports the Linux kernel base board imx7d-pico.dtsi and
specific
dts for imx7d-pico-pi
I recommend including the upstream Linux SHA in the commit log to make
it easier to validate agains
On 10.12.18 08:07, Chris Packham wrote:
Sync the Armada-38x device tree files with Linux 4.20-rc5. The changes
not taken are new compatible strings for the uart and nand flash
controller. The nand binding is best updated if/when the mtd/nand
infrastructure is updated.
Signed-off-by: Chris Packha
On Mon, Jan 21, 2019 at 6:32 PM Jagan Teki wrote:
>
> Environment and fastboot MMC devices are configured based number
> of mmc slots defined on particular board in sunxi platform.
>
> If number of slots are not more than 1, it assigns 0 which usually mmc
> device on SD slot. With DM_MMC it is det
On 17.12.18 16:10, Marek Behún wrote:
This is the fourth version of patches for Turris Mox.
Changes from previous version:
- changed patch subject prefix from board: turris_mox to arm: mvebu: turris_mox
as requested by Stefan
- added Reviewed-by Stefan
- add description of the changes for wa
On 26.12.18 10:37, Heinrich Schuchardt wrote:
An NVME drive may be installed on the MACCHIATObin board using the PCIe
slot or on the Clearfog Pro using mini a PCI-e slot. With the configuration
change it becomes usable.
Signed-off-by: Heinrich Schuchardt
---
configs/clearfog_gt_8k_defconfig
On 21.12.18 17:30, Heinrich Schuchardt wrote:
The memory area [0x400-0x420[ is occupied by the PSCI firmware. Any
attempt to access it from U-Boot leads to an immediate crash.
So let's make the same memory reservation as the vendor device tree.
Signed-off-by: Heinrich Schuchardt
---
cf
On 02.01.19 17:26, Baruch Siach wrote:
These macros are not used anywhere in the boards code.
Cc: Chris Packham
Cc: Dirk Eibach
Cc: Mario Six
Cc: Dennis Gilmore
Signed-off-by: Baruch Siach
---
board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 4
board/Marvell/db-88f6820-gp/db-88f6820-
On 10.01.19 09:01, Chris Packham wrote:
From: Chris Packham
This is a range of stackable network switches. The SoC is Armada-385 and
there are a number of variants with differing network port
configurations. The DP variants are intended for a harsher operating
environment so they use a differen
Hi Tom,
please pull the first Marvell patches in this merge window with the
following changes:
- Sync Armada-38x dts with Linux 4.20 from Chris
- Misc changes and enhancements to Turris Mox (v4) from Marek
- Reserve PSCI area for A
On 21/01/2019 10:34, jorisoffouga wrote:
Le 21/01/2019 à 10:52, Bryan O'Donoghue a écrit :
On 20/01/2019 21:18, Joris Offouga wrote:
This patch imports the Linux kernel base board imx7d-pico.dtsi and
specific
dts for imx7d-pico-pi
I recommend including the upstream Linux SHA in the comm
On Mon, Jan 21, 2019 at 4:12 PM Chen-Yu Tsai wrote:
>
> On Mon, Jan 21, 2019 at 6:32 PM Jagan Teki wrote:
> >
> > Environment and fastboot MMC devices are configured based number
> > of mmc slots defined on particular board in sunxi platform.
> >
> > If number of slots are not more than 1, it ass
In this patch series GetNextVariableName runtime service is implemented.
v3
rebase on efi-next
v2
update variable_name_size in GetNextVariableName
add more comments
change some internal variable names
AKASHI Takahiro (2):
efi_loader: implement GetNextVariableName
From: AKASHI Takahiro
There is a bug in efi variables test.
Fix it with some cosmetic improvements.
Please note that efi variables test still fails at QueryVariableInfo()
and GetVariable(), but this is not due to a change in this patch.
==8<==
Testing EFI API implementation
Selected test:
201 - 270 of 270 matches
Mail list logo
