On Tue, Aug 19, 2014 at 01:48:55PM +, Marcel Ziswiler wrote:
> > + /* TPS659110: LDO2_REG = 1.05V, ACTIVE */
> > + data[0] = 0x15;
> > + addr = 0x31;
> > +
> > + err = i2c_read(PMU_I2C_ADDRESS, addr, 1, data, 1);
>
> You sure about that read?
>
> Me wondering why it did not work on my
On Wed, Aug 20, 2014 at 10:56:58AM +0200, Marcel Ziswiler wrote:
> On Wed, 2014-08-20 at 08:38 +0200, Thierry Reding wrote:
> > Hehe... this should probably be i2c_write() instead. Perhaps this is on
> > by default on Beaver and Cardhu but not on the particular revision that
>
On Wed, Aug 20, 2014 at 01:12:20PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >This series attempts to fix a long-standing problem in the rtl8169 driver
> >(though the same problem may exist in other dri
On Wed, Aug 20, 2014 at 01:23:13PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Implement an API that can be used by drivers to allocate memory from a
> >poll that is mapped uncached. This is useful if dri
Hi,
I've been running a couple of builds for a patch that I'm working on and
I noticed the following errors happening for all Exynos boards:
arch/arm/cpu/armv7/exynos/clock.c: In function 'clock_get_periph_rate':
arch/arm/cpu/armv7/exynos/clock.c:263:47: warning: array subscript i
From: Thierry Reding
The leds array within struct ventana has space for 3 elements, but the
setup_board_gpio() function tries to set up 4 GPIOs for LEDs. Recent
versions of GCC complain about that:
board/gateworks/gw_ventana/gw_ventana.c: In function 'setup_board_gpio':
On Wed, Aug 20, 2014 at 01:15:15PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >size is always non-negative, so it should be unsigned, whereas the
> >address and size can be larger than 32 bit on 64-bit a
On Wed, Aug 20, 2014 at 01:23:13PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
[...]
> >diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
>
> >+#ifdef CONFIG_SYS_NONCACHED_MEMORY
> >+void noncached_init(
On Wed, Aug 20, 2014 at 01:29:57PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >RX and TX descriptor rings should be aligned to 256 byte boundaries. Use
> >the DEFINE_ALIGN_BUFFER() macro to define the
On Wed, Aug 20, 2014 at 01:33:06PM -0600, Stephen Warren wrote:
> On 08/18/2014 02:00 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >To work around potential issues with explicit cache maintenance of the
> >RX and TX descriptor rings, allocate them from a po
On Wed, Aug 20, 2014 at 12:51:35PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes
> >the second root port to a miniPCIe slot. Ena
On Wed, Aug 20, 2014 at 12:43:58PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >The Beaver has an ethernet NIC connected to the PCIe bus. Enable the
> >PCIe controller and the network device driver so that
On Wed, Aug 20, 2014 at 12:20:20PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >This reset is required for PCIe and the corresponding ID therefore needs
> >to be defined.
>
> It might be worth mention
On Wed, Aug 20, 2014 at 12:24:11PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Implement the powergate API that allows various power partitions to be
> >power up and down.
>
> >diff --git a/a
On Wed, Aug 20, 2014 at 12:32:45PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >This controller was introduced on Tegra114 to handle XUSB pads. On
> >Tegra124 it is also used for PCIe and SATA pin muxing a
On Wed, Aug 20, 2014 at 12:32:45PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
[...]
> >diff --git a/arch/arm/cpu/tegra124-common/xusb-padctl.c
> >b/arch/arm/cpu/tegra124-common/xusb-padctl.c
>
> >+int fdtdec_count_strings(const void *f
On Wed, Aug 20, 2014 at 12:38:15PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
> >PCIe controller and the network driver so that the
On Wed, Aug 20, 2014 at 12:39:14PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Add the device tree node for the PCIe controller found on Tegra30 SoCs.
>
> >diff --git a/arch/arm/dts/tegra30.dt
On Wed, Aug 20, 2014 at 01:04:22PM -0600, Stephen Warren wrote:
> On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Add support for the PCIe controller found on some generations of Tegra.
> >Tegra20 has 2 root ports with a total of 4 lanes,
On Fri, Aug 22, 2014 at 01:27:57PM -0600, Simon Glass wrote:
> On 22 August 2014 06:09, Thierry Reding wrote:
[...]
> > Note that I haven't turned the AS3722 support into a "PMIC" driver,
> > because the framework for that seems to be unusable. It doesn'
On Fri, Aug 22, 2014 at 11:33:39AM -0600, Stephen Warren wrote:
> On 08/20/2014 01:04 PM, Stephen Warren wrote:
> >On 08/18/2014 01:16 AM, Thierry Reding wrote:
> >>From: Thierry Reding
> >>
> >>Add support for the PCIe controller found on some generations of
On Fri, Aug 22, 2014 at 02:12:19PM -0600, Simon Glass wrote:
> On 22 August 2014 13:40, Thierry Reding wrote:
[...]
> > I've opted instead to provide an somewhat higher-level API that users
> > can call to set voltages on the regulators and enable them.
>
> But then
On Fri, Aug 22, 2014 at 09:03:49PM -0600, Simon Glass wrote:
> Hi Thierry,
>
> On 19 August 2014 07:06, Thierry Reding wrote:
> > On Tue, Aug 19, 2014 at 06:52:22AM -0600, Simon Glass wrote:
> >> Hi Theirry,
> >>
> >>
> >> On 19 August 2014 04
On Fri, Aug 22, 2014 at 07:47:36PM -0600, Simon Glass wrote:
> Hi Thierry,
>
> On 22 August 2014 16:03, Thierry Reding wrote:
> > On Fri, Aug 22, 2014 at 02:12:19PM -0600, Simon Glass wrote:
> >> On 22 August 2014 13:40, Thierry Reding wrote:
> > [...]
> >
On Sun, Aug 24, 2014 at 11:18:04PM +0200, Marcel Ziswiler wrote:
> On Fri, 2014-08-22 at 13:31 -0600, Stephen Warren wrote:
> > > +#define CONFIG_USE_ARCH_MEMCPY
> >
> > That last option isn't set on other Tegra boards; what's it for?
>
> This is my special gift to Thierry to leverage architectur
From: Thierry Reding
This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is
mostly due to the large number of infrastructure that's added (libfdt, Tegra
specific drivers required by the PCIe driver). In this version I've included
all patches that were previously
From: Thierry Reding
Given a device tree node and a property name, the fdt_count_strings()
function counts the number of strings found in the property value.
Signed-off-by: Thierry Reding
---
include/libfdt.h| 9 +
lib/libfdt/fdt_ro.c | 20
2 files changed
From: Thierry Reding
Provide a new modifier to vsprintf() to print phys_addr_t variables to
avoid having to cast or #ifdef when printing them out. The %pa modifier
is used for this purpose, so phys_addr_t variables need to be passed by
reference, like so:
phys_addr_t start = 0
From: Thierry Reding
Given a device tree node and a property name, the new fdt_find_string()
function will look up a given string in the string list contained in the
property's value and return its index.
Signed-off-by: Thierry Reding
---
Changes in v2:
- rename to fdt_find_string() to r
From: Thierry Reding
Given a device tree node, a property name and an index, the new function
fdt_get_string_index() will return in an output argument a pointer to
the index'th string in the property's value.
The fdt_get_string() is a shortcut for the above with the index being 0.
From: Thierry Reding
The fdtdec_pci_get_bdf() function returns the bus, device, function
triplet of a PCI device by parsing the "reg" property according to the
PCI device tree binding.
Acked-by: Simon Glass
Signed-off-by: Thierry Reding
---
include/fdtdec.h | 11 +++
li
From: Thierry Reding
The fdt_for_each_subnode() iterator macro provided by this patch can be
used to iterate over a device tree node's subnodes. At each iteration a
loop variable will be set to the next subnode.
Acked-by: Simon Glass
Signed-off-by: Thierry Reding
---
Changes in v2:
- sp
From: Thierry Reding
This macro can be overridden in source files (before including common.h)
and can be used to specify a prefix for debug and error messages. An
example of how to use this is shown below:
#define pr_fmt(fmt) "foo: " fmt
#include
...
From: Thierry Reding
When listing the devices on a PCI bus, the current code will blindly try
to access all devices. Internally this causes pci_bus_to_hose() to be
repeatedly called and output an error message every time. Prevent this
by calling pci_bus_to_hose() once and abort early if no bus
From: Thierry Reding
i2c_bus_init() takes a bus number but relies on the currently selected
bus to determine which adapter to initialize. Make the function use the
bus passed in as parameter rather than the currently selected bus. While
at it, keep a pointer to the specified bus to avoid having
From: Thierry Reding
When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.
This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is
From: Thierry Reding
This API operates on I2C adapters or I2C clients (a new type of object
that refers to a particular slave connected to an adapter). This is
useful to avoid having to call i2c_set_bus_num() whenever a device is
being accessed.
Drivers for I2C devices are supposed to embed a
From: Thierry Reding
This is useful to retrieve the U-Boot bus number of an I2C controller
given a device tree node.
Signed-off-by: Thierry Reding
---
drivers/i2c/tegra_i2c.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
From: Thierry Reding
A subsequent patch will introduce a new API to access I2C adapters
directly rather than going through the bus number and constantly looking
up the same adapter. In order to share the adapter initialization code,
move it into a separate function and make i2c_init_bus() use it
From: Thierry Reding
This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't support PCIe or SATA.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
arch/arm/cpu/tegra
From: Thierry Reding
This reset is required for PCIe and the corresponding ID therefore needs
to be defined. The enumeration value for this was properly defined on
some SoCs but not on others. Similarly, some contained it in the mapping
of peripheral IDs to clock IDs, other didn't. This
From: Thierry Reding
The AS3722 provides a number of DC/DC converters and LDOs as well as 8
GPIOs.
Signed-off-by: Thierry Reding
---
drivers/power/Makefile | 1 +
drivers/power/as3722.c | 300 +
include/fdtdec.h | 1 +
include/power
From: Thierry Reding
Implement the powergate API that allows various power partitions to be
power up and down.
Signed-off-by: Thierry Reding
---
Changes in v2:
- wait for power-up/off operation to complete before returning
- document PCIE/VDEC mixup in REMOVE_CLAMPING register
- add symbolic
From: Thierry Reding
The XUSB pad controller is used for pinmuxing of the XUSB, PCIe and SATA
lanes.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts
From: Thierry Reding
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.
Tegra20 and Tegra30 also provide
From: Thierry Reding
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.
This is based on the Linux kernel driver
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra20 SoCs.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
Changes in v2:
- add missing interrupt-map-mask and interrupt-map properties
- include unit address in device tree node name
arch/arm/dts
From: Thierry Reding
Add the PCIe and SATA lane configuration to the Jetson TK1 device tree,
so that the XUSB pad controller can be appropriately configured.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124-jetson-tk1.dts | 26 ++
1
From: Thierry Reding
The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network driver so that the device can boot over
the network.
Signed-off-by: Thierry Reding
---
Changes in v2:
- add all regulators from Linux kernel DTS
- use proper set of PCIe
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra30 SoCs.
Signed-off-by: Thierry Reding
---
Changes in v2:
- include unit address in device tree node name
- add missing interrupt-map-mask and interrupt-map properties
arch/arm/dts/tegra30.dtsi
From: Thierry Reding
The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC
is available on the dock over the PCIe bus. Enable the PCIe controller
and the network device driver so that the device can boot over the
network.
Signed-off-by: Thierry Reding
---
Changes in v2
From: Thierry Reding
Add a device tree node for the GIC found on Tegra30. U-Boot doesn't use
it directly but subsequent patches will add device tree nodes that
reference it by phandle.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra30.dtsi | 9 +
1 file changed, 9 inser
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra124 SoCs.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124.dtsi | 67 ++
include/dt-bindings/clock/tegra124-car.h | 341 +++
2
From: Thierry Reding
The Beaver has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network device driver so that the device can
boot over the network.
In addition the board has a mini-PCIe expansion slot.
Signed-off-by: Thierry Reding
---
Changes in v2:
- move
From: Thierry Reding
size_t is the canonical type to represent variables that contain a size.
Use it instead of signed integer. Physical addresses can be larger than
32-bit, so use a more appropriate type for them as well. phys_addr_t is
a type that is 32-bit on systems that use 32-bit addresses
From: Thierry Reding
Add a device tree node for the GIC v2 found on the Cortex-A15 CPU
complex of Tegra124. U-Boot doesn't use this but subsequent patches will
add device tree nodes that reference it by phandle.
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
---
arch/arm/dts/teg
From: Thierry Reding
The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes
the second root port to a miniPCIe slot. Enable the PCIe controller and
the network driver to allow the device to boot over the network.
Signed-off-by: Thierry Reding
---
Changes in v2:
- move AS3722
From: Thierry Reding
When DEBUG is set, output memory region used for malloc().
Signed-off-by: Thierry Reding
---
common/dlmalloc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index f9873393c183..3d6391e60acf 100644
--- a/common/dlmalloc.c
From: Thierry Reding
Remove two gratuituous blank lines, uses u32 (instead of int) as the
type for values that will be written to a register, moves the beginning
of the variable declaration section to a separate line (rather than the
one with the opening brace) and keeps the function signature
From: Thierry Reding
RX and TX descriptor rings should be aligned to 256 byte boundaries. Use
the DEFINE_ALIGN_BUFFER() macro to define the buffers so that they don't
have to be manually aligned later on. Also make sure that the buffers do
align to cache-line boundaries in case the cache-li
From: Thierry Reding
According to the top-level README file, this configuration setting can
be used to override the number of receive buffers that an ethernet NIC
uses.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
From: Thierry Reding
Some boards, most notably those with a PCIe ethernet NIC, require this
to avoid cache coherency problems. Since the option adds very little
code and overhead enable it across all Tegra generations. Other drivers
may also start supporting this functionality at some point, so
From: Thierry Reding
Implement an API that can be used by drivers to allocate memory from a
pool that is mapped uncached. This is useful if drivers would otherwise
need to do extensive cache maintenance (or explicitly maintaining the
cache isn't safe).
The API is protected using th
From: Thierry Reding
Add the fdt_get_resource() and fdt_get_named_resource() functions which
can be used to parse resources (memory regions) from an FDT. A helper to
compute the size of a region is also provided.
Signed-off-by: Thierry Reding
---
Changes in v2:
- use existing fdt_address_cells
From: Thierry Reding
This network interface card in found on the NVIDIA Jetson TK1.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 22ad70719937..8183df39e77a 100644
--- a/drivers
From: Thierry Reding
To work around potential issues with explicit cache maintenance of the
RX and TX descriptor rings, allocate them from a pool of uncached memory
if the architecture supports it.
Signed-off-by: Thierry Reding
---
Changes in v2:
- if non-cached memory is not available, use
On Wed, Aug 27, 2014 at 06:52:16AM +0200, Heiko Schocher wrote:
> Hello Thierry,
>
> Am 26.08.2014 17:33, schrieb Thierry Reding:
> >From: Thierry Reding
> >
> >i2c_bus_init() takes a bus number but relies on the currently selected
> >bus to determine whic
On Wed, Aug 27, 2014 at 07:21:51AM +0200, Heiko Schocher wrote:
> Hello Thierry,
>
> Am 26.08.2014 17:34, schrieb Thierry Reding:
> >From: Thierry Reding
> >
> >This API operates on I2C adapters or I2C clients (a new type of object
>
> which is a bad idea ...
On Wed, Aug 27, 2014 at 07:26:12AM +0200, Heiko Schocher wrote:
> Hello Thierry,
>
> Am 26.08.2014 17:34, schrieb Thierry Reding:
[...]
> >+int as3722_init(struct as3722 **pmicp, const void *fdt)
> >+{
> >+struct as3722 *pmic =&as3722_pmic;
> >+in
On Tue, Aug 26, 2014 at 11:04:56AM -0600, Stephen Warren wrote:
> On 08/26/2014 09:33 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Provide a new modifier to vsprintf() to print phys_addr_t variables to
> >avoid having to cast or #ifdef when printing them
On Tue, Aug 26, 2014 at 05:14:17PM -0600, Simon Glass wrote:
> Hi Thierry,
>
> On 26 August 2014 09:33, Thierry Reding wrote:
> >
> > From: Thierry Reding
> >
> > Provide a new modifier to vsprintf() to print phys_addr_t variables to
> > avoid having t
On Wed, Aug 27, 2014 at 09:07:58AM +0200, Heiko Schocher wrote:
> Hello Thierry,
>
> Am 27.08.2014 08:21, schrieb Thierry Reding:
> >On Wed, Aug 27, 2014 at 07:21:51AM +0200, Heiko Schocher wrote:
> >>Hello Thierry,
> >>
> >>Am 26.08.2014 17:34, schrieb
On Wed, Aug 27, 2014 at 11:56:41AM +0200, Heiko Schocher wrote:
> Hello Thierry,
>
> Am 27.08.2014 10:51, schrieb Thierry Reding:
> >On Wed, Aug 27, 2014 at 09:07:58AM +0200, Heiko Schocher wrote:
> >>Hello Thierry,
> >>
> >>Am 27.08.2014 08:21, schrieb
On Tue, Aug 26, 2014 at 03:54:50PM +0300, Tuomas Tynkkynen wrote:
> On 18/08/14 10:16, Thierry Reding wrote:
> [...]
> > +static int as3722_gpio_direction_output(u8 gpio, u8 level)
> > +{
> > + u8 value;
> > + int err;
> > +
> > + if
On Wed, Aug 27, 2014 at 03:28:06PM +0200, Thierry Reding wrote:
> On Tue, Aug 26, 2014 at 03:54:50PM +0300, Tuomas Tynkkynen wrote:
> > On 18/08/14 10:16, Thierry Reding wrote:
> > [...]
> > > +static int as3722_gpio_direction_output(u8 gpio, u8 level)
> > > +{
On Wed, Aug 27, 2014 at 11:41:55AM -0600, Stephen Warren wrote:
> On 08/27/2014 01:01 AM, Thierry Reding wrote:
> >On Tue, Aug 26, 2014 at 11:04:56AM -0600, Stephen Warren wrote:
> >>On 08/26/2014 09:33 AM, Thierry Reding wrote:
> >>>From: Thierry Reding
> &
On Wed, Nov 12, 2014 at 06:26:51PM -0700, Simon Glass wrote:
[...]
> diff --git a/drivers/power/as3722.c b/drivers/power/as3722.c
[...]
> +int as3722_init(struct udevice **devp)
> +{
> + struct udevice *pmic;
> + u8 id, revision;
> + int bus = 0;
> + int address = 0x40;
Is there a
On Wed, Nov 12, 2014 at 06:27:16PM -0700, Simon Glass wrote:
> From: Thierry Reding
>
> This network interface card in found on the NVIDIA Jetson TK1.
Self-correct: s/in found/is found/
Thierry
pgpjpdj35sX6r.pgp
Description: PGP signature
On Wed, Nov 12, 2014 at 06:27:15PM -0700, Simon Glass wrote:
[...]
> diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
> index fc8c31e..cd26c36 100644
> --- a/drivers/net/rtl8169.c
> +++ b/drivers/net/rtl8169.c
> @@ -41,6 +41,7 @@
> * Modified to use le32_to_cpu and cpu_to_le32 properly
Hi Simon,
Thanks for taking this over. Besides the three small nitpicks (which
aren't really blockers, so feel free to ignore) this looks like what I
would've done had I respun the series.
Thierry
pgp5d5C1G4rUn.pgp
Description: PGP signature
___
U-Boo
On Tue, Jan 13, 2015 at 07:44:50PM +, Ian Campbell wrote:
> Hi Thierry,
>
> I needed to boot my Jetson in NS mode (in order to boot Xen) and was
> investigating the possibility of PSCI support when I discovered that you
> had already started on it[0]. Hurrah!
>
> I cherry-picked the relevant
On Wed, Jan 14, 2015 at 08:58:41AM +, Ian Campbell wrote:
> On Wed, 2015-01-14 at 08:57 +0100, Thierry Reding wrote:
> > > I also pushed my tree to gitorious:
> > > https://gitorious.org/ijc/u-boot jetson-psci-v1
> > >
> > > I would Ack your pa
On Thu, Jan 15, 2015 at 04:59:12PM -0700, Stephen Warren wrote:
> On 01/13/2015 12:45 PM, Ian Campbell wrote:
> >The secure world code is relocated to the MB just below the top of 4G, we
> >reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
> >not protected in h/w. See ne
On Thu, Jan 15, 2015 at 07:19:37PM +, Mark Rutland wrote:
> On Wed, Jan 14, 2015 at 07:57:25AM +0000, Thierry Reding wrote:
> > On Tue, Jan 13, 2015 at 07:44:50PM +, Ian Campbell wrote:
> > > Hi Thierry,
> > >
> > > I needed to boot my Jetson in NS
On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> > On Wed, Jan 14, 2015 at 08:58:41AM +, Ian Campbell wrote:
> > > On Wed, 2015-01-14 at 08:57 +0100, Thierry Reding wrote:
> > > > > I
On Fri, Jan 16, 2015 at 10:24:03AM +, Ian Campbell wrote:
> On Fri, 2015-01-16 at 11:05 +0100, Thierry Reding wrote:
> > On Fri, Jan 16, 2015 at 09:43:22AM +, Ian Campbell wrote:
> > > On Thu, 2015-01-15 at 15:55 +0100, Thierry Reding wrote:
> > > > On Wed, Ja
On Fri, Jan 16, 2015 at 04:11:19PM +, Ian Campbell wrote:
> On Fri, 2015-01-16 at 17:03 +0100, Thierry Reding wrote:
> > On Fri, Jan 16, 2015 at 10:24:03AM +, Ian Campbell wrote:
> > > On Fri, 2015-01-16 at 11:05 +0100, Thierry Reding wrote:
> > > > On Fri, Ja
On Wed, Jan 21, 2015 at 10:00:39AM +0800, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Jan 20, 2015 at 10:31 PM, Simon Glass wrote:
> > +Thierry
> >
> > Hi Bin,
> >
> > On 20 January 2015 at 05:59, Bin Meng wrote:
> >> Hi Simon,
> >>
> >> On Tue, Jan 20, 2015 at 11:19 AM, Simon Glass wrote:
> >>> In
On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
> Hi,
>
> On Wed, Jan 21, 2015 at 3:05 AM, Simon Glass wrote:
> > Hi Sjoerd,
> >
> > On 20 January 2015 at 10:06, Sjoerd Simons
> > wrote:
> >> commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
> >> new fdtdec pci h
On Tue, Jan 20, 2015 at 12:05:40PM -0700, Simon Glass wrote:
> Hi Sjoerd,
>
> On 20 January 2015 at 10:06, Sjoerd Simons
> wrote:
> > commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
> > new fdtdec pci helpers. To get the device index of the root port, the
> > "reg" proper
On Wed, Jan 21, 2015 at 04:46:42PM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Wed, Jan 21, 2015 at 4:05 PM, Thierry Reding wrote:
> > On Wed, Jan 21, 2015 at 10:00:39AM +0800, Bin Meng wrote:
> >> Hi Simon,
> >>
> >> On Tue, Jan 20, 2015 at 10:
On Wed, Jan 21, 2015 at 05:15:42PM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Wed, Jan 21, 2015 at 4:24 PM, Thierry Reding wrote:
> > On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
> >> Hi,
> >>
> >> On Wed, Jan 21, 2015 at 3:0
the allocated
bus number after enumeration.
So this patch:
Tested-by: Thierry Reding
Acked-by: Thierry Reding
pgpdFr1HlEzwz.pgp
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On Thu, Jan 22, 2015 at 07:20:15PM +, Mark Rutland wrote:
> On Fri, Jan 16, 2015 at 09:12:59AM +0000, Thierry Reding wrote:
> > On Thu, Jan 15, 2015 at 07:19:37PM +, Mark Rutland wrote:
> > > On Wed, Jan 14, 2015 at 07:57:25AM +0000, Thierry Reding wrote:
> > > &
On Thu, Jan 22, 2015 at 12:04:06AM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Wed, Jan 21, 2015 at 5:40 PM, Thierry Reding wrote:
> > On Wed, Jan 21, 2015 at 05:15:42PM +0800, Bin Meng wrote:
> >> Hi Thierry,
> >>
> >> On Wed, Jan 21, 2015 at 4:24 PM,
On Fri, Jan 23, 2015 at 12:37:20PM +, Mark Rutland wrote:
> On Fri, Jan 23, 2015 at 10:10:45AM +0000, Thierry Reding wrote:
> > On Thu, Jan 22, 2015 at 07:20:15PM +, Mark Rutland wrote:
> > > On Fri, Jan 16, 2015 at 09:12:59AM +0000, Thierry Reding wrote:
> > > &
On Sat, Jan 24, 2015 at 12:19:56PM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Fri, Jan 23, 2015 at 6:19 PM, Thierry Reding wrote:
> > On Thu, Jan 22, 2015 at 12:04:06AM +0800, Bin Meng wrote:
> >> Hi Thierry,
> >>
> >> On Wed, Jan 21, 2015 at 5:40 PM,
er sent it out because I never managed to get
PCIe to work. Anyway:
Reviewed-by: Thierry Reding
signature.asc
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On Mon, Oct 05, 2015 at 04:59:17PM -0600, Stephen Warren wrote:
[...]
> It'd be nice if "git format-patch -C" recognized this as a copy, since
> that's why I created a separate patch, but it doesn't seem to:-(
Have you tried tuning the behaviour by passing the similarity index to
-C? I've had some
On Sun, Aug 02, 2015 at 03:27:53PM -0600, Simon Glass wrote:
> Hi,
>
> On 27 July 2015 at 11:13, Simon Glass wrote:
> > Hi,
> >
> > On 23 July 2015 at 10:51, Stephen Warren wrote:
> >> From: Thierry Reding
> >>
> >> Signed-off-by: Thierry R
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