Re: [U-Boot] [PATCH 13/23] net: pch_gbe: Add cache maintenance

2016-09-27 Thread Bin Meng
On Tue, Sep 27, 2016 at 2:29 AM, Paul Burton wrote: > On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is > present. When there is no IOCU we need to writeback or invalidate the > data caches at appropriate points. Perform this cache maintenance in >

[U-Boot] [PATCH 13/23] net: pch_gbe: Add cache maintenance

2016-09-26 Thread Paul Burton
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is present. When there is no IOCU we need to writeback or invalidate the data caches at appropriate points. Perform this cache maintenance in the pch_gbe driver which is used on the MIPS Boston development board. Signed-off-by: