Add compatible strings for the PCIe bridges & EG20T ethernet controller
such that the devices are probed during boot, without the user needing
to manually cause that to happen by running "pci enum" after boot. This
allows for use of the ethernet controller without the manual PCI
enumeration step. Enable the GPIO driver to provide the PHY reset GPIO.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 arch/mips/Kconfig              | 1 +
 arch/mips/dts/img,boston.dts   | 6 +++---
 configs/boston32r2_defconfig   | 1 +
 configs/boston32r2el_defconfig | 1 +
 configs/boston64r2_defconfig   | 1 +
 configs/boston64r2el_defconfig | 1 +
 6 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9fa41e9..407dad8 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -78,6 +78,7 @@ config MACH_PIC32
 config TARGET_BOSTON
        bool "Support Boston"
        select DM
+       select DM_GPIO
        select DM_SERIAL
        select OF_CONTROL
        select MIPS_CM
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
index 1d4eeda..1623a25 100644
--- a/arch/mips/dts/img,boston.dts
+++ b/arch/mips/dts/img,boston.dts
@@ -130,7 +130,7 @@
                };
 
                pci2_root@0,0,0 {
-                       compatible = "pci10ee,7021";
+                       compatible = "pci10ee,7021", "pci-bridge";
                        reg = <0x00000000 0 0 0 0>;
 
                        #address-cells = <3>;
@@ -138,7 +138,7 @@
                        #interrupt-cells = <1>;
 
                        eg20t_bridge@1,0,0 {
-                               compatible = "pci8086,8800";
+                               compatible = "pci8086,8800", "pci-bridge";
                                reg = <0x00010000 0 0 0 0>;
 
                                #address-cells = <3>;
@@ -146,7 +146,7 @@
                                #interrupt-cells = <1>;
 
                                eg20t_mac@2,0,1 {
-                                       compatible = "pci8086,8802";
+                                       compatible = "pci8086,8802", 
"intel,pch-gbe";
                                        reg = <0x00020100 0 0 0 0>;
                                        phy-reset-gpios = <&eg20t_gpio 6 
GPIO_ACTIVE_LOW>;
                                };
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 6b38da9..61360c5 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_CFI_FLASH=y
 CONFIG_DM_ETH=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index d56c405..74d16ea 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_CFI_FLASH=y
 CONFIG_DM_ETH=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 2c0ac4d..4d67804 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_CFI_FLASH=y
 CONFIG_DM_ETH=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index e784d68..e0d514f 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_CFI_FLASH=y
 CONFIG_DM_ETH=y
-- 
2.10.0

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