Hi,
Here is a patch to add support for manually setting the system (CCB)
clock divider for MPC85xx boards.
This patch introduces a new macro CONFIG_CCB_CLCKDIV, whose value
should be set to the desired clock divider. If the macro is not
defined, this patch has no effect.
As an example, the new option can be used in the board config file
like this:
#define CONFIG_CCB_CLCKDIV 4
The patch is against git commit:
a524e112b424c6843800ea2f19d3a8cf01d0aa94
John Ogness
Signed-off-by: John Ogness <[EMAIL PROTECTED]>
Add support for manually setting the system (CCB) clock divider.
This patch introduces a new macro CONFIG_CCB_CLCKDIV, whose value should
be set to the desired clock divider. If the macro is not defined, this
patch has no effect. For the MPC85xx boards, the clock divider defaults
to a value of 8.
As an example, the new option can be used in the board config file like
this:
#define CONFIG_CCB_CLCKDIV 4
Signed-off-by: John Ogness <[EMAIL PROTECTED]>
---
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index baf8b81..94dce72 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -69,6 +69,31 @@ struct cpu_type *identify_cpu(u32 ver)
return NULL;
}
+#ifdef CONFIG_CCB_CLCKDIV
+void set_lcb_clock(uint clkdiv)
+{
+ volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+ uint lcrr;
+
+ switch (clkdiv) {
+ case 2:
+ case 4:
+ case 8:
+ lcrr = lbc->lcrr;
+ lcrr &= ~0xf;
+ lcrr |= clkdiv;
+ lbc->lcrr = lcrr;
+ lcrr = lbc->lcrr;
+ __asm__ __volatile__ ("isync" : : : "memory");
+ break;
+
+ default:
+ /* invalid CCB system clock divider */
+ break;
+ }
+}
+#endif
+
int checkcpu (void)
{
sys_info_t sysinfo;
@@ -91,6 +116,10 @@ int checkcpu (void)
major = SVR_MAJ(svr);
minor = SVR_MIN(svr);
+#ifdef CONFIG_CCB_CLCKDIV
+ set_lcb_clock(CONFIG_CCB_CLCKDIV);
+#endif
+
puts("CPU: ");
cpu = identify_cpu(ver);
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