Paul Mundt wrote: > On Thu, Aug 28, 2008 at 07:56:03AM +0200, Carmelo AMOROSO wrote: >> Carmelo AMOROSO wrote: >>> Hi Paul, All >>> attached a little fix in clone asm code for SH to use a delayed branch >>> instead of a normal branch. >>> Let me know so I can commit it. >>> >>> Regards, >>> Carmelo >>> >>> >> Please hold on. After a discussion with a colleague of mine, really sh4 >> architectural expert, we are thinking that it could not be a real >> optimization due to potential unuseful i-cache miss. >> So, I need to clarify it before. sorry ;-) >> > You could work around that by prefetching the icache line earlier on in > the entry, but if you do that, you will want to measure to see if you > still have any savings from using the delayed branch. I expect the > prefetch will negate any micro-optimized win you are aiming for with the > delayed branch. > Thanks Paul for this feedback. Indeed, in the delay slot it should be done instruction that are required to the instruction at the destination target and later.
So, discard this patch. Carmelo _______________________________________________ uClibc mailing list uClibc@uclibc.org http://busybox.net/cgi-bin/mailman/listinfo/uclibc
