On 08/24/2010 03:43 PM, Mike Frysinger wrote:
Apparently the ARM MPU's are not nearly as capable as the blackfin MPU.
The ARM MPU deals with whole regions, and typically only up to 8 memory
regions can be controlled by the MPU at any one time, each region having
one protection setting (r/w/x
On 08/26/2010 12:04 PM, Mike Frysinger wrote:
On Thursday, August 26, 2010 14:19:41 Steve Longerbeam wrote:
The ARM MPU can do something similar. MPU regions can overlap, and a
simple priority scheme is used to decide which region's permissions
apply to a memory access that overlaps (higher
On 08/26/2010 06:07 PM, Mike Frysinger wrote:
On Thursday, August 26, 2010 18:45:08 Steve Longerbeam wrote:
On 08/26/2010 12:04 PM, Mike Frysinger wrote:
On Thursday, August 26, 2010 14:19:41 Steve Longerbeam wrote:
The ARM MPU can do something similar. MPU regions can
On 08/23/2010 01:18 PM, Mike Frysinger wrote:
On Monday, August 23, 2010 14:16:30 Steve Longerbeam wrote:
On 08/23/2010 10:47 AM, Steve Longerbeam wrote:
On 08/22/2010 05:20 PM, Mike Frysinger wrote:
the common code changes will need justification as to why they exist
On 08/22/2010 05:20 PM, Mike Frysinger wrote:
as it stands, this breaks all non-arm NOMMU ports. the patch will need to be
broken up into arm-specific and arm-independent parts.
ok, I can do that.
the common code changes will need justification as to why they exist at all.
we're doing
On 08/23/2010 10:47 AM, Steve Longerbeam wrote:
On 08/22/2010 05:20 PM, Mike Frysinger wrote:
as it stands, this breaks all non-arm NOMMU ports. the patch will
need to be
broken up into arm-specific and arm-independent parts.
ok, I can do that.
the common code changes will need
This is a patch that adds Memory Protection Unit support for no-MMU ARM.
The default MPU configuration on most ARM7-based cores only allows MPU
control of the first 1MB of address space. However this can be easily
changed, and on our core the MPU controls the first 1GB of address
space, and
