Sebastian Siewior wrote:
the ff1 and bitrev opcode appears in ISA C and ISA A+ what isn't
supported by all plattforms. The assembly optimization is automaticly
enabled if the compiler understand the required cpu keyword.
My m5235 seems to boot and run fine so far.
Signed-off-by: Sebastian Siewior <[EMAIL PROTECTED]>
Ok, this looks good to me.
Regards
Greg
Thanks Andrea. I didn't know about that define.
arch/m68knommu/Makefile | 9 +++++----
include/asm-m68knommu/bitops.h | 30 ++++++++++++++++++++++++++++++
2 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index e0b5f62..4d4a880 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -90,13 +90,14 @@ export PLATFORM BOARD MODEL CPUCLASS
cflags-$(CONFIG_M5206) := -m5200
cflags-$(CONFIG_M5206e) := -m5200
cflags-$(CONFIG_M520x) := -m5307
-cflags-$(CONFIG_M523x) := -m5307
+cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307)
cflags-$(CONFIG_M5249) := -m5200
-cflags-$(CONFIG_M527x) := -m5307
+cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307)
cflags-$(CONFIG_M5272) := -m5307
-cflags-$(CONFIG_M528x) := -m5307
+cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307)
+cflags-$(CONFIG_M528x) := $(call cc-option,-m528x,-m5307)
cflags-$(CONFIG_M5307) := -m5307
-cflags-$(CONFIG_M532x) := -m5307
+cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307)
cflags-$(CONFIG_M5407) := -m5200
cflags-$(CONFIG_M68328) := -m68000
cflags-$(CONFIG_M68EZ328) := -m68000
diff --git a/include/asm-m68knommu/bitops.h b/include/asm-m68knommu/bitops.h
index c142fbf..6f3685e 100644
--- a/include/asm-m68knommu/bitops.h
+++ b/include/asm-m68knommu/bitops.h
@@ -14,8 +14,38 @@
#error only <linux/bitops.h> can be included directly
#endif
+#if defined (__mcfisaaplus__) || defined (__mcfisac__)
+static inline int ffs(unsigned int val)
+{
+ if (!val)
+ return 0;
+
+ asm volatile(
+ "bitrev %0\n\t"
+ "ff1 %0\n\t"
+ : "=d" (val)
+ : "0" (val)
+ );
+ val++;
+ return val;
+}
+
+static inline int __ffs(unsigned int val)
+{
+ asm volatile(
+ "bitrev %0\n\t"
+ "ff1 %0\n\t"
+ : "=d" (val)
+ : "0" (val)
+ );
+ return val;
+}
+
+#else
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/__ffs.h>
+#endif
+
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/ffz.h>
--
------------------------------------------------------------------------
Greg Ungerer -- Chief Software Dude EMAIL: [EMAIL PROTECTED]
Secure Computing Corporation PHONE: +61 7 3435 2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
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