[uClinux-dev] nested interrupts on m68knommu(Coldfire)

2008-04-24 Thread Markus Franke
Dear uClinux Developers, as per my knowledge the Coldfire Architecture supports nested interrupts by managing the "interrupt priority mask" field in the processor status register (SR or PS). The question is now if the current architechture specific implementation in uClinux supports this sc

Re: [uClinux-dev] nested interrupts on m68knommu(Coldfire)

2008-04-27 Thread Greg Ungerer
Hi Markus, Markus Franke wrote: as per my knowledge the Coldfire Architecture supports nested interrupts by managing the "interrupt priority mask" field in the processor status register (SR or PS). The question is now if the current architechture specific implementation in uClinux supports thi

Re: [uClinux-dev] nested interrupts on m68knommu(Coldfire)

2008-04-28 Thread Markus Franke
Hi Greg, Zitat von Greg Ungerer <[EMAIL PROTECTED]>: No, it doesn't. Interrupts in uClinux are either enabled, or disabled. There is no use of a priority based scheme. Thank you very much for this information. Best regards, Markus ___ uClinux-de

Re: [uClinux-dev] nested interrupts on m68knommu (Coldfire)

2008-04-30 Thread Greg Ungerer
Title: Re: [uClinux-dev] nested interrupts on m68knommu(Coldfire) Hi Markus, Markus Franke wrote: > as per my knowledge the Coldfire Architecture supports nested interrupts > by managing the "interrupt priority mask" field in the processor status > register (SR or P

Re: [uClinux-dev] nested interrupts on m68knommu (Coldfire)

2008-04-30 Thread Markus Franke
Title: Re: [uClinux-dev] nested interrupts on m68knommu(Coldfire) Hi Greg, Zitat von Greg Ungerer <[EMAIL PROTECTED]>: > No, it doesn't. > Interrupts in uClinux are either enabled, or disabled. > There is no use of a priority based scheme. Thank you very much