Hi Honza,
Just checking if you have the official patch available for this issue.
As far as I am concerned barring couple of issues, everything seems to be
working fine on our big-endian system. Much relieved. :)
-Thanks
Nikhil
On Thu, May 5, 2016 at 3:24 PM, Nikhil Utane
It worked for me. :)
I'll wait for your formal patch but until then I am able to proceed
further. (Don't know if I'll run into something else)
However now encountering issue in pacemaker.
May 05 09:35:53 [15184] airv_cu pacemakerd: warning: pcmk_child_exit: The
cib process (15224) can no
Nikhil
Found the root-cause.
In file schedwrk.c, the function handle2void() uses a union which was not
initialized.
Because of that the handle value was computed incorrectly (lower half was
garbage).
56 static hdb_handle_t
57 void2handle (const void *v) { union u u={}; u.v = v; return u.h;
Found the root-cause.
In file schedwrk.c, the function handle2void() uses a union which was not
initialized.
Because of that the handle value was computed incorrectly (lower half was
garbage).
56 static hdb_handle_t
57 void2handle (const void *v) { union u u={}; u.v = v; return u.h; }
58
Thanks for your response Dejan.
I do not know yet whether this has anything to do with endianness.
FWIW, there could be something quirky with the system so keeping all
options open. :)
I added some debug prints to understand what's happening under the hood.
*Success case: (on x86 machine): *
Hi,
On Mon, May 02, 2016 at 08:54:09AM +0200, Jan Friesse wrote:
> >As your hardware is probably capable of running ppcle and if you have an
> >environment
> >at hand without too much effort it might pay off to try that.
> >There are of course distributions out there support corosync on
>
It is Freescale e6500 processor. Nobody here has tried running it in LE
mode so it is going to take some doing.
We are going to add some debug logs to figure out where does corosync
initialization get stalled.
If you have have suggestions, pls let us know.
-Thanks
Nikhil
On Mon, May 2, 2016 at
So what I understand what you are saying is, if the HW is bi-endian, then
enable LE on PPC. Is that right?
Need to check on that.
On Mon, May 2, 2016 at 12:49 PM, Nikhil Utane
wrote:
> Sorry about my ignorance but could you pls elaborate what do you mean by
> "try
Sorry about my ignorance but could you pls elaborate what do you mean by
"try to ppcle"?
Our target platform is ppc so it is BE. We have to get it running only on
that.
How do we know this is LE/BE issue and nothing else?
-Thanks
Nikhil
On Mon, May 2, 2016 at 12:24 PM, Jan Friesse
As your hardware is probably capable of running ppcle and if you have an
environment
at hand without too much effort it might pay off to try that.
There are of course distributions out there support corosync on
big-endian architectures
but I don't know if there is an automatized regression for
As your hardware is probably capable of running ppcle and if you have an
environment
at hand without too much effort it might pay off to try that.
There are of course distributions out there support corosync on
big-endian architectures
but I don't know if there is an automatized regression for
Re-sending as I don't see my post on the thread.
On Sun, May 1, 2016 at 4:21 PM, Nikhil Utane
wrote:
> Hi,
>
> Looking for some guidance here as we are completely blocked otherwise :(.
>
> -Regards
> Nikhil
>
> On Fri, Apr 29, 2016 at 6:11 PM, Sriram
Hi,
Looking for some guidance here as we are completely blocked otherwise :(.
-Regards
Nikhil
On Fri, Apr 29, 2016 at 6:11 PM, Sriram wrote:
> Corrected the subject.
>
> We went ahead and captured corosync debug logs for our ppc board.
> After log analysis and comparison
Corrected the subject.
We went ahead and captured corosync debug logs for our ppc board.
After log analysis and comparison with the sucessful logs( from x86
machine) ,
we didnt find * "[ MAIN ] Completed service synchronization, ready to
provide service.*" in ppc logs.
So, looks like corosync is
14 matches
Mail list logo