Hello group this is my first time posting has anyone seen the RX 2 SMA
bad or out of spec? I can wiggle the cable and my NF drops 15db. It does
not do this on the TRX sma. It also seems strange they didnt put a nut on
the SMA to hold it to the case. Thanks
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Hi all,
I haven't looked at daughterboard calibration in a long time, and picking
it up, it sure looks broken to me. I'm using X310 + WBX on rfnoc-devel as
of March. Let's assume for the moment I'm running a stock FPGA image -- I'm
not, but for testing I replicated the same results on the stock im
Thank you
On Thu, Jun 28, 2018 at 2:01 PM, Ian Buckley wrote:
> There is no conceptual reason why you can’t build an RFNoC design on B210,
> it uses the same USRP3 base architecture and FPGA source files….*HOWEVER*….
> B210 is implemented with a Spartan6 FPGA and all the implementation work
> fo
There is no conceptual reason why you can’t build an RFNoC design on B210, it
uses the same USRP3 base architecture and FPGA source files….*HOWEVER*…. B210
is implemented with a Spartan6 FPGA and all the implementation work for RFNoC
is done using Xilinx’s Vivado design tools which support only
Hi All,
Is it possible to generate RFNoC blocks for the B210? I can't find a lot of
information about it. Can some one show me the URL if there is a website
talking about it?
Cheers
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Hey Jason,
On Thu, Jun 28, 2018 at 3:31 PM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I know this is an older thread, but I too am struggling to bring a block that
> someone else designed for us in 2015.4 to work in 2017.4. I dug around but I
> don't see any of our cu
I know this is an older thread, but I too am struggling to bring a block that
someone else designed for us in 2015.4 to work in 2017.4. I dug around but I
don't see any of our custom blocks using clear_tx_seqnum in their sub-modules
or their config registers. They do use the config registers qu
Hi All,
I use RFnoc block and i run it with gnuradio on the X310.
I have two different cases that I try to use the same RFnoc block in the
flow graph and i get the same error.
The cases are :
1. I want to create chain of fir block to minimize signal from 250M to 4M.
in order to do it i want to cr
Hi everyone,
I am still working on the synchronization of my two USRP X310. Both get
the same 10 MHz, 1 PPS and LO signals. I made a small piece of code to
toggle one of the GPIOs at the Aux I/O of each USRP in a timed manner:
#define GPIOMASK (1 << 4)
usrpDevice->set_gpio_attr("FP0", "CTRL
Hi Derek,
I did what you suggested, but I have some synchroniziation issue between
the two USRP. The four channels within each USRP are synchronized, but I
get one out of three random phases between the two USRP at every start.
Once initialized, the phases are constant.
My code for setting th
Here's what I see
*Creating the usrp device with: num_recv_frames=256...*
*[INFO] [UHD] Win32; Microsoft Visual C++ version 14.0; Boost_106300;
UHD_3.11.0.1-37-g2c9087d1*
*[INFO] [B200] Detected Device: B210*
*[INFO] [B200] Operating over USB 3.*
*[ERROR] [USB] libusb_session_impl::libusb_event_ha
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