Good morning. Thanks for your answers, I fixed the record in the data
array. But
it did not help me. But I noticed that everything works for me when I add a
cycle
while samps:
samps = self.streamer_rx.recv (self.recv_buff,
self.metadata_rx)
after
self.stream_cmd = lib.types.strea
Hello,
Im trying to write and read data from the ddr3 ram in the usrp x310 using
the fpga.
I wasn't able to find if there is any other blocks that use the ram (in the
defualt image ) .
Also are there any rfnoc blocks that uses the ram ? Thx
___
USRP-user
Hm, are you 100% sure that you really received as many samples as you
ordered before?
On Sun, 2019-05-12 at 12:41 +0300, Ivan Zahartchuk wrote:
> Good morning. Thanks for your answers, I fixed the record in the data
> array. But it did not help me. But I noticed that everything works
> for me whe
I think yes. If I had not received a certain number of samples, I would
have had errors with their further recording and processing. Since I attach
to this value throughout the entire program. If you have any suggestions on
how to verify this, I will be grateful.
вс, 12 мая 2019 г. в 15:29, Marcus
On Sun, May 12, 2019 at 6:34 AM Daniel Ozer via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
> Im trying to write and read data from the ddr3 ram in the usrp x310 using
> the fpga.
> I wasn't able to find if there is any other blocks that use the ram (in
> the defualt image ) .
> Also
==
*** Announcing GNU Radio and RFNoC Workshops ***
** This Week **
Ettus Research will be running a series of free, hands-on,
technical workshops, and you are welcome to attend!
Lo