On Thu, Jan 9, 2020 at 6:45 PM Richard Bell wrote:
> No I don't need to know phase information. I'm cross correlating the pairs
> of receivers and the location of the peak gives me the TDOA. If the
> hardware chains across different radios introduce different delays, that
> would invalidate the T
No I don't need to know phase information. I'm cross correlating the pairs
of receivers and the location of the peak gives me the TDOA. If the
hardware chains across different radios introduce different delays, that
would invalidate the TDOA measurement. So long as the delay is the same
through all
On 01/09/2020 09:49 AM, voonna santosh wrote:
Hi Marcus,
Build is failing for 3.14.1.1 and the reason is that "uhd_dpdk.c"
is written in C99 mode.
BR,
Santosh
If you aren't actually using DPDK, which you wouldn't have been with UHD
3.10, then when you're building, in the CMake step, use
On Thu, Jan 9, 2020 at 12:14 PM Richard Bell via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
> I'm working on a TDOA based localization platform using 3 USRP X300's as
> receivers. I have them synchronized with a 10 MHz ref and PPS signal
> generated by an OctoClock. However, I'm ha
Sam,
I have a cable connected to a logic analyzer for my X310 which I was using to
investigate the --bitbang option on the gpio test for changing the GPIO outputs
. I could probably do something manually to look at it as inputs.
Jeff
From: Sam Reiter
Sent: Th
Jeff,
I'd say it's worth trying. Do you currently have any cabling or external
connections to your GPIO port?
Sam Reiter
Ettus Research
On Mon, Jan 6, 2020 at 6:27 PM Jeff S wrote:
> Sam,
>
> Everything was downloaded from the images_downloader. I have not modified
> the FPGA image or any of
Jeff,
Yes. For ATR to put that line high on TX, the value should be 1 as you
noted.
Sam Reiter
Ettus Research
On Tue, Jan 7, 2020 at 1:12 PM Jeff S via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Relating to the description of the GPIO:
> https://files.ettus.com/manual/page_gpio_api.html
Felix, thanks for the catch. That looks like a problem I may have
introduced by accident a few months ago. This PR should fix it, hopefully:
https://github.com/EttusResearch/fpga/pull/47/files
Note I expect this would get merged into master and potentially not
backported to whatever version of uhd
Akin,
I'd recommend you check out our DPDK setup guide - hot off the presses:
https://kb.ettus.com/Getting_Started_with_DPDK_and_UHD
Sam Reiter
Ettus Research
On Wed, Jan 8, 2020 at 10:52 PM akin soysal via USRP-users <
usrp-users@lists.ettus.com> wrote:
>
>
> -- Forwarded message ---
On 01/09/2020 09:49 AM, voonna santosh wrote:
Hi Marcus,
Build is failing for 3.14.1.1 and the reason is that "uhd_dpdk.c"
is written in C99 mode.
BR,
Santosh
What OS and version are you using? What compiler version?
On Wednesday, January 8, 2020, 08:47:07 PM GMT, Marcus D. Leech
wrot
Hello,
I'm working on a TDOA based localization platform using 3 USRP X300's as
receivers. I have them synchronized with a 10 MHz ref and PPS signal
generated by an OctoClock. However, I'm having trouble getting reliable
localization performance through this system. My TDOA measurements are not
wh
Hi Marcus, Build is failing for 3.14.1.1 and the reason is that "uhd_dpdk.c"
is written in C99 mode.BR,Santosh
On Wednesday, January 8, 2020, 08:47:07 PM GMT, Marcus D. Leech
wrote:
On 01/08/2020 03:45 PM, voonna santosh wrote:
Hi Marcus, Which version would you suggest? Also
Hi Brian,
thank you for the answer, with your help I was able to successfully build
an Image! One last question: Do I need to worry about all those critical
warnings that popped up during the build? Seems like a lot to me.
Example:
CRITICAL WARNING: [Vivado 12-1790] Evaluation License Warning: T
Hi Aaron,
thanks for spotting this! Indeed that was a mistake. I also had to
adjust the dpdk-num-mbufs=4059 and dpdk-mbuf-cache-size=315 like in the
example configuration file for uhd 3.15.0 and then it worked! Yay!
Now lets see if OpenAirInterface runs more stable with this! :)
Florian.
On
14 matches
Mail list logo
