But it should. This is basic functionality that is completely broken. The
commit to fix it is simple.
On Fri, Feb 9, 2024 at 10:06 AM Marcus D. Leech
wrote:
> On 09/02/2024 09:07, Rob Kossler via USRP-users wrote:
>
> This is fixed in 4.5 and 4.6. Are you able to switch?
> Rob
>
> I'll add that
On Sat, Feb 10, 2024 at 2:47 PM Chris wrote:
> All, I am trying to offload some of my processing power onto my X310's
> FPGA. I have the environment set up but still find myself confused on how
> to build the out of tree block. I was able to add a block and I'm not sure
> what to do next?
>
>
> M
All, I am trying to offload some of my processing power onto my X310's
FPGA. I have the environment set up but still find myself confused on how
to build the out of tree block. I was able to add a block and I'm not sure
what to do next?
My design process is as follows: Matlab, get HDL code for DS
