Hi Derek, Thanks for answering my question. That is good to hear, but does this not apply to the BasicRx?
When I try to use the subdevice spec "A:A A:B" (i.e. to use the same sampling setup as a a TwinRx) with a BasicRx I get a "uhd::assertion_error". If it is not currently supported could it be fixed by modifying the host-side code? Kind regards,Joshua Sendall >>> Derek Kozel <derek.ko...@ettus.com> 12/09/2017 18:30 >>> [ This email could possibly be spam. Only open if you are expecting this mail. This sender does not have a SPF record configured for their domain. The purpose of an SPF (Sender policy framework) record is to prevent spammers from sending messages with forged “From” addresses from the originating domain. It also identifies which mail servers are permitted to send email on behalf of your domain. ] Hello Joshua, The default FPGA image now has two DDCs which each have two DSP chains. The message you link to is from 2014 and we've substantially updated the contents of the FPGA since then. Currently the TwinRX is the primary daughtercard making use of these additional DDC chains as the others are 1RX per daughtercard. Regards, Derek On Tue, Sep 12, 2017 at 3:15 AM, Josh Sendall via USRP-users <usrp-users@lists.ettus.com> wrote: Hi all, I have been looking through some previous posts on the mailing list, for example [USRP-users] subdev spec for two channels with USRP X310 ( http://http//lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2014-July/010010.html) which suggests that it should not be possible to receive 4 channels (with the standard FPGA image and UHD) on an X300/X310, due to them only having 2 DDC blocks. However I then saw this project ( https://github.com/EttusResearch/gr-doa) (gr-doa), which seems to suggest that, using the standard FPGA image, one can run 4 channels using 2 TwinRx daughter boards. Would that not still require 4 DDC blocks, or can a DDC block be configured to process 2 real streams? Kind regards, Joshua Sendall Joshua Sendall Radar Signal Analyst Defense, Peace, Safety and Security (DPSS) Council for Scientific and Industrial Research (CSIR) Building 44 - Room C 433 CSIR, Meiring Naude Road, Pretoria Tel: 012 841 3575 This message is subject to the CSIR's copyright terms and conditions, e-mail legal notice, and implemented Open Document Format (ODF) standard. The full disclaimer details can be found at http://www.csir.co.za/disclaimer.html. Please consider the environment before printing this email. _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com -- This message is subject to the CSIR's copyright terms and conditions, e-mail legal notice, and implemented Open Document Format (ODF) standard. The full disclaimer details can be found at http://www.csir.co.za/disclaimer.html. Please consider the environment before printing this email.
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