Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-03 Thread Marcus D. Leech via USRP-users
On 01/03/2019 05:05 AM, Brais Ares wrote: I also happen to have some spare B200 devices around and I can confirm what @Martin stated. Since we are working in a jitter-sensitive critical application and after the tests I've perfomed, I'm inclined to think the minimum jitter scenario occurs whe

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-03 Thread Brais Ares via USRP-users
I also happen to have some spare B200 devices around and I can confirm what @Martin stated. Since we are working in a jitter-sensitive critical application and after the tests I've perfomed, I'm inclined to think the minimum jitter scenario occurs when using the internal reference (2 ppm), given t

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Marcus D. Leech via USRP-users
On 01/02/2019 06:18 PM, Martin K wrote: Can the VCTCXO DAC be controlled via the UHD API? I would rather manually calibrate on demand than see large jumps in frequency. I don't think it is exposed in UHD, but with a little FPGA work, one could perhaps have a control register that manifests in th

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Martin K via USRP-users
Can the VCTCXO DAC be controlled via the UHD API? I would rather manually calibrate on demand than see large jumps in frequency. On Wed, Jan 2, 2019 at 5:16 PM Marcus D. Leech via USRP-users wrote: > > On 01/02/2019 09:54 AM, Brais Ares via USRP-users wrote: > > Hello, > > We've just bought an AX

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Marcus D. Leech via USRP-users
On 01/02/2019 09:54 AM, Brais Ares via USRP-users wrote: Hello, We've just bought an *AXIOM90OCXO*[1] (actual configuration: 5 V, ±*50 ppb, +7.7 dBm*) and we are having trouble configuring it as an external clock reference on a B200mini. All we do in code is set the clock source as external:

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Robin Coxe via USRP-users
The B200/B210 has an Analog Devices analog PLL (ADF4002) [U101]. The B200mini series are intended as small form factor, low-cost SDRs, not high-precision devices. The PLL is implemented as digital logic in the FPGA to minimize both cost and PCB board space, but limits the phase and frequency accu

Re: [USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Martin K via USRP-users
Brais, I have two USRP here in front of me: B210, B200mini When I run a sample program (C++) which specifies an external reference, the B200mini shows a variable frequency offset. It seems to lock (with high jitter) but then it "jumps" and I would say the offset changes by +-10 Hz for a few second

[USRP-users] Weird effects setting external clock source in a B200mini

2019-01-02 Thread Brais Ares via USRP-users
Hello, We've just bought an *AXIOM90 OCXO* [1] (actual configuration: 5 V, ±*50 ppb, +7.7 dBm*) and we are having trouble configuring it as an external clock reference on a B200mini. All we do in code is set the clock source as external: - *usrp->set_clock_source("external");* And loop until