Hi Dmitriy -- Here is a very useful old post from this list originally from
v8 developer Kevin Milliken. Do keep in mind this is 3 year old info but I
think is largely still valid. Hope this helps!
https://groups.google.com/forum/#!topic/v8-dev/rLF1aUWG6Jc
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Thanks for the fixes Danno! We were just starting to look after the revert,
but
you beat us to it.
https://codereview.chromium.org/1287383003/
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Hey Danno - Akos mentioned the MIPS port CL. We still have bugs in
test-run-native-calls. If you want to land this now, you can add that to the
skip list for mips & mips64:
'test-run-native-calls/*': [SKIP],
Everything else builds/tests fine. Hopefully we'll get this one fixed
tomorrow.
ht
LGTM. Thanks!
https://codereview.chromium.org/1323763002/
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Reviewers: akos.palfi.imgtec, balazs.kilvady,
Message:
PTAL.
Description:
MIPS: minor cleanup in macro-assembler.
Fix some dodgy temp-register usage and remove some unnecessary
push/pop's.
BUG=
Please review this at https://codereview.chromium.org/1324553004/
Base URL: https://chromium.googl
Reviewers: akos.palfi.imgtec, balazs.kilvady, Benedikt Meurer,
Message:
PTAL
Description:
MIPS: Fix MacroAssembler::AssertFunction()
Porting mistake in ccbb4ff0 '[builtins] Unify the various versions of
[[Call]]
with a Call builtin.', which only showed as debug assertion in later commit
db2b
LGTM. But please add the bug number to the issue, so it gets tracked
properly.
https://codereview.chromium.org/1314673010/
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LGTM, thanks!
https://codereview.chromium.org/1318153006/
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https://codereview.chromium.org/1323763002/diff/20001/src/mips/assembler-mips.cc
File src/mips/assembler-mips.cc (right):
https://codereview.chromium.org/1323763002/diff/20001/src/mips/assembler-mips.cc#newcode2030
src/mips/assembler-mips.cc:2030: DCHECK(!src.rm().is(t8));
Why check for t8 here?
Hey Benedikt - Please find MIPS ports from Ákos in
https://codereview.chromium.org/1311003006/
https://codereview.chromium.org/1311013008/
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rs-l-g-t-m (I'm OOO today) for inclusion in
https://codereview.chromium.org/1311013008/
optdebug 'check' suite passes all tests.
https://codereview.chromium.org/1311003006/
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Thanks a lot for the big-endian fix, Karl, we really appreciate it!
https://codereview.chromium.org/1324803003/
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Reviewers: Benedikt Meurer, Jakob, Michael Achenbach,
Message:
If this looks OK, please commit it also, as I will be OOO on Monday. Thanks!
Description:
Fix a -Wsign-compare error under GCC 4.9.2.
BUG=
Please review this at https://codereview.chromium.org/1322693004/
Base URL: https://chromiu
LGTM, thanks!
https://codereview.chromium.org/1326173002/
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LGTM. Thanks!
https://codereview.chromium.org/1310883005/
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LGTM.
FYI, for Benedikt and v8 team, LoadRoot() is preferred over li() where
possible,
since it is one instruction vs two.
MIPS64 ABI (n64) has 8 argument registers rather than the 4 on MIPS32 ABI,
and
the "conventional names" for registers 4 thru 15 were therefore changed from
[a0-a3][t0-
Hi Michael, the MIPS ports are ready in
https://codereview.chromium.org/1318353003/
https://codereview.chromium.org/1328603003/
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Reviewers: mvstanton, balazs.kilvady, akos.palfi.imgtec,
Message:
Hey Michael - here are MIPS ports, l-g-t-m for inclusion in your
https://codereview.chromium.org/1328603003/
Description:
MIPS: Vector ICs: platform support for vector-based stores.
Port of https://codereview.chromium.org/1328603
Also, you should add a 'TEST=' line, to show at least one of the tests that
fail
due to this error.
Also, there is no pre-existing convention for this, but since this test
fails
for r6 only, I suggest putting that in () after the test. For example:
TEST=mjsunit/asm/float64array-negative-off
nit: please edit commit message to say "Fix illegal use of ", rather
than
Fixing (2 places)
I'm assuming from your change to lithium-codegen-mips that you ran tests, to
look for additional bad uses of 'at' in ldc1/sdc1. Please confirm this.
https://codereview.chromium.org/1323763002/diff/
LGTM.
https://codereview.chromium.org/1322953002/
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On 2015/08/31 03:43:05, paul.l... wrote:
Windows builds are not happy, will investigate further on Monday.
__declspec(align) will not take symbols, only numbers, according to this old
post: http://computer-programming-forum.com/7-vc.net/fbdd26987ff6f71e.htm.
I didn't find a suitable pre-process
Windows builds are not happy, will investigate further on Monday.
https://codereview.chromium.org/1323663003/
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To
Reviewers: titzer,
Message:
Neither of these solutions look pleasing/production-ready to me. Maybe you
can
suggest something more elegant. Please see email with more details.
Description:
MIPS64: Fix alignment issue in test-run-native-calls.
BUG=
Please review this at https://codereview.chr
l-g-t-m for inclusion in https://codereview.chromium.org/1316933002/
https://codereview.chromium.org/1310233004/
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https://codereview.chromium.org/1310233004/diff/1/src/mips/lithium-codegen-mips.cc
File src/mips/lithium-codegen-mips.cc (right):
https://codereview.chromium.org/1310233004/diff/1/src/mips/lithium-codegen-mips.cc#newcode5595
src/mips/lithium-codegen-mips.cc:5595: __ Branch(false_label, lt, at,
O
Hey Benedikt - MIPS ports in https://codereview.chromium.org/1316543002/
https://codereview.chromium.org/1304633002/
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The ports were done by Balázs & Ákos, I've re-uploaded this to fix a tiny
issue.
Benedikt, this is ready for inclusion in your
https://codereview.chromium.org/1304633002/
https://codereview.chromium.org/1316543002/
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Reviewers: akos.palfi.imgtec, balazs.kilvady,
Message:
l-g-t-m except for one typo. I will also delete a couple (now) unused
functions
from the macro-assemblers.
https://codereview.chromium.org/1316543002/diff/1/src/objects.h
File src/objects.h (right):
https://codereview.chromium.org/13165
Reviewers: akos.palfi.imgtec, djordje, rmcilroy,
Message:
Fix a mistake in my porting of https://codereview.chromium.org/1245133002
for
mips. PTAL.
Description:
MIPS64: Fix InterpreterEntryTrampoline().
Was incorrectly loading BytecodeArray::kFrameSizeOffset as 64-bit int.
TEST=cctest/test-
LGTM, thanks!
https://codereview.chromium.org/1276813004/
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LGTM, but there are some nits to fix before committing.
The current commit message is a little inaccurate, (there are no changes in
this
CL to class_fmt, or min_max (though I asked for naming changes in
min_max.), and
the 2nd line seems completely redundant with the title.
I suggest:
MIPS:
Reviewers: bbudge, akos.palfi.imgtec, balazs.kilvady,
Message:
PTAL.
Description:
MIPS: Fix reg use in SIMD.js Add the other SIMD Phase 1 types.
Port 7b9670b63b486ba3b6f8a569552d307282dbccfd
Only fails in debug builds.
TEST=mjsunit/harmony/simd
BUG=
Please review this at https://codereview.c
Committed manually as
https://crrev.com/38501327599ae6ac7c255205c61c00aeed09da13
https://codereview.chromium.org/1216823003/
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Nice fix! LGTM, modulo the two typos. I will fix these and land this now.
https://codereview.chromium.org/1216823003/diff/60001/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):
https://codereview.chromium.org/1216823003/diff/60001/src/mips64/assembler-mips64.cc#newcod
This was not needed for interpreter, as callee-saved regs turned out to be
unnecessary there, so the urgency is removed. However, this does remove a
couple
instructions, and is probably a worthwhile cleanup. I will revisit this in
next
couple days, and add mips64, if I decide to land this.
h
OK, here is the updated mips32 port, and a mips64 version.
I tried to get too clever and and rebase this on unlanded
https://codereview.chromium.org/1254293006/ which is in the CQ. That didn't
work, so there an extra patchset to clean that up. You will have to fixup
linkage-mips[64].cc since this
LGTM, thanks.
https://codereview.chromium.org/1265603002/
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Reviewers: balazs.kilvady, akos.palfi.imgtec, ilija.pavlovic_imgtec.com,
Message:
PTAL, this is first step in getting some callee-saved regs into our register
allocator list, for use in interpreter. MIPS64 port still to come.
Description:
MIPS: Tweak CEntryStub to free up callee-saved regs s0-s2
DBC: looks like your new use of r5 conflicts with r5 use in CEntryStub. More
details in https://codereview.chromium.org/1253273002/.
https://codereview.chromium.org/1245133002/
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On 2015/07/28 07:45:15, rmcilroy (OOO until 10th Aug) wrote:
I'm OOO but still working from Munich until Friday :). Landing this to
unblock
you for now should be fine until you find a better solution - we won't be
making
any calls from the interpreter for a while, so it won't matter whether
patchset 2 lgtm.
But a couple nits in commit message: title should remove the word 'test',
since
you fixed disasm itself, and TEST should show the actual failing test:
TEST=cctest/test-disasm-mips[64]/Type3
https://codereview.chromium.org/1258743004/
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On 2015/07/27 07:45:23, rmcilroy (OOO until 10th Aug) wrote:
Are t1 and t2 callee saved for JS calls? If so, lgtm. Thanks!
No, these new regs are not callee-saved, and your original s0,s1 are, but
are
not in our 'allocatable' list. Let me see what I can do here. Since you're
OOO,
I expect w
Reviewers: Yang, Jakob,
Message:
Assuming its ok for us to review and land our own changes as before.
The two arm OWNERS file only had Ross, who's at the top level now, so I
omitted
those.
Description:
Add arch OWNERS files to full-codegen dir.
BUG=
Please review this at https://codereview
Reviewers: rmcilroy, balazs.kilvady, akos.palfi.imgtec,
Message:
Cool stuff, Ross! Here's a first-cut MIPS port for
https://codereview.chromium.org/1245133002/
I still need to do the MIPS64, and take one more look at this before you
include
it in your CL. I'll do that in the morning my time.
Reviewers: rmcilroy, akos.palfi.imgtec, balazs.kilvady,
Message:
PTAL.
FWIW, I've opened an issue to increase the number of allocatable regs on
MIPS
arch-variants that will support it (mips64 and mips32r6).
Interestingly, we are limited by the number of FPU regs (16 total, 14
allocatable on
On 2015/07/25 16:50:34, Igor Sheludko wrote:
sgtm for b), but I'm not sure about a) because .
The MIPS port for combined a & b is done by Balázs in
https://codereview.chromium.org/1255953002/
If you do decide to split this up, we can rework it as needed.
https://codereview.chromium.org/12
l-g-t-m for inclusion in https://codereview.chromium.org/1250413002/
https://codereview.chromium.org/1255953002/
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Reviewers: akos.palfi.imgtec, balazs.kilvady, Benedikt Meurer, Igor
Sheludko,
Description:
MIPS64: Fix LoadGlobalViaContextStub
Also make a minor improvement in the mips32 StoreGlobalViaContextStub
and fix some bad comments in the macro-assembler.
BUG=
Please review this at https://coderevie
Sorry for all the problems, I'd missed that this was behind the flag, so my
testing was useless. Igor, Benedikt, thanks a lot for fixing these! One
more fix
coming.
https://codereview.chromium.org/1257603004/
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Code LGTM.
Commit message has some nits, please fix before committing:
Please don't use '[64]' on first line. CLs that affect both mips32 and
mips64
are just tagged with 'MIPS:'
Also, the wording in the 2nd para was not clear, maybe you meant "DSLL
printing
has *no* info..."
Suggest this
Reviewers: Yang, Jakob,
Message:
PTAL. If this looks ok, please commit it as well (I won't be back online
for 8
or more hours, and our target bots are whining about this :)
Description:
Fix a -Wsign-compare error under GCC 4.9.2.
BUG=
Please review this at https://codereview.chromium.org/12
MIPS ports for this CL are in https://codereview.chromium.org/1238253002/
https://codereview.chromium.org/1238143002/
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Reviewers: balazs.kilvady, dusmil.imgtec, Benedikt Meurer,
Message:
PTAL, this is for inclusion in https://codereview.chromium.org/1238143002/
Description:
MIPS: [stubs] Optimize LoadGlobalViaContextStub and
StoreGlobalViaContextStub.
Original commit message:
This is the initial round of op
LGTM.
https://codereview.chromium.org/1232313007/
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Reviewers: balazs.kilvady, dusmil.imgtec,
Message:
PTAL.
Description:
MIPS64: Fix string stubs.
An innocent-looking change in 'c63e50ed Reland Update V8 DEPS.' exposed
latent bugs in SubStringStub and StringCharFromCodeGenerator.
TEST=mjsunit/string-replace, msjunit/string-split, others
BU
LGTM. Let's land it.
Michael, what's the reason for adding these -32768 -> 65535U changes in
https://codereview.chromium.org/1237793003 ?
It breaks test when built with clang, and fails to compile target builds
under
gcc (checking param is int16_t)
https://codereview.chromium.org/1233323002/
Actually, a small nit on the commit message. You can just edit the issue
here in
Reitveld to fix.
When we change both MIPS & MIPS64, we just use 'MIPS:' in message. Please
remove
the '[64]'
Also, we try for 72 char limit on first line of commit message, and try to
wrap
remaining lines to
LGTM.
https://codereview.chromium.org/1237083003/
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MIPS part LGTM.
https://codereview.chromium.org/1237813002/
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l-g-t-m for merge into https://codereview.chromium.org/1234833003/
https://codereview.chromium.org/1233213002/
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T
On 2015/07/14 19:40:45, Yang wrote:
Thanks Balazs, that was quick! As MIPS is a tree closer (and commit queue
blocker), do you prefer me to manually land both changes in succession or
should
I take your patch and merge it into my CL?
Yang, I think it's best to merge it into your CL. Then if a
code l-g-t-m, some nits in the comments :-)
https://codereview.chromium.org/1233213002/diff/1/src/mips/assembler-mips-inl.h
File src/mips/assembler-mips-inl.h (right):
https://codereview.chromium.org/1233213002/diff/1/src/mips/assembler-mips-inl.h#newcode369
src/mips/assembler-mips-inl.h:369: /
mips32 port looks good.
Some register usage/naming issues on mips64: the mips64 ABI allows passing
of 8
arguments in registers, and therefore, the 'conventional' names of
registers 4
through 15 were changed for mips64, as compared to mips32 (allows 4
arguments
passed in registers):
mips32
Reviewers: Benedikt Meurer, mtbrandyberry, dusmil.imgtec,
Message:
PTAL.
Description:
Fix big-endian after '[osr] Increase Code::profiler_ticks to 28 bits.'
Several users of kKindSpecificFlags1Offset (aliased as kFullCodeFlags) were
reading/writing bytes -- not endian agnostic.
BUG=
Please re
Reviewers: rmcilroy, Benedikt Meurer,
Message:
PTAL.
Description:
Fix a -Wsign-compare error under GCC 4.9.2
BUG=
Please review this at https://codereview.chromium.org/1230063011/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+1, -1 lines):
M src/compiler/lin
LGTM.
https://codereview.chromium.org/1233923002/
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LGTM.
https://codereview.chromium.org/1235883004/
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Reviewers: balazs.kilvady, dusmil.imgtec, Benedikt Meurer, Hablich,
Message:
I put the test case in test-macro-assembler-mips rather than
test-run-machops/RunSwitch..., as the failure mode is very mips-specific.
mips64
port still to come (in the morning).
Description:
MIPS: Fix BlockTrampolin
https://codereview.chromium.org/1233623004/
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Reviewers: balazs.kilvady, dusmil.imgtec,
Message:
PTAL.
Description:
MIPS: Check that branches to trampoline pool do actually reach.
Do the check in release mode, too. Prefer crash over mis-patched
branch instruction.
BUG=v8:4294
LOG=N
Please review this at https://codereview.chromium.org/12
L-g-t-m for inclusion in https://codereview.chromium.org/1232583002/
https://codereview.chromium.org/1231093002/
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Reviewers: akos.palfi.imgtec, dusmil.imgtec,
Message:
Tested to not break anything under existing tests, but I can't repro the
code-age problem, so this is a swag at that. PTAL. For testing only, do not
commit.
Description:
MIPS: Avoid use of a0 as return address in jalr.
Trial fix for code-agi
Right, you mean the temporary assembly buffer just happens to cross 256MB
boundary. There is no restriction from that, I agree.
As a nit: I am having trouble with the name 'IsAllAddressValid' - its not
clear
what exactly that means, and it gets more confusing when passing true/false
and
then
On 2015/06/30 00:17:18, commit-bot: I haz the power wrote:
CQ is trying da patch.
I don't have owner/approval rights for tests (only for mips dirs). You or
someone else on the v8 team will need to approve this.
https://codereview.chromium.org/1212963004/
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Yes, it is for mips64el, the patch LGTM. Thanks, Dan!
Details: traditionally mips and mips64 have referred to the big-endian
variants,
and mipsel and mips64el to the little-endian variants. We do support
big-endian
on mips (32) for v8, but not currently on mips64, so the only 64-bit target
+ machenbach
https://codereview.chromium.org/1200833013/
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Reviewers: Michael Achenbach, Jakob, kilvadyb, dusmil.imgtec,
Message:
PTAL. Should get our bots green, and unblock the rolls.
Description:
MIPS: skip embenchen/zlib test.
zlib is broken for mips after 35eb3a0260d349cb4201fed66ff62a438962bd47.
We're still working on a fix. Skip test for now,
Very nice fix, LGTM.
nit: test-api/RequestInterruptTestWith*Accessor is still on the skip list
for
mips eb in cctest.status.
https://codereview.chromium.org/1220443002/
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I don't understand the motivation to move away from the range-based for
loops in
https://codereview.chromium.org/1205023002/.
Note that he moved away only in the case of the Poke loops, where they used
MiscField::encode(slot). We do not use that, we use slot as an immediate
value.
But we _do
Simple issue, just took me a while to spot it. The arguments copy loop is
based
on a3/r3, and that was no longer being setup. See comments.
The old way used one less instruction on arm & mips. You could do the load
from
stack after your Push()'s, using the variable offset to sp like you did
On 2015/06/25 19:59:52, arv wrote:
I fixed the push/pop discrepancy and now both mips and mips64 error out
with
"Unaligned write".
The unaligned write is because the stack pointer is corrupted when we try
to pop
all the arguments off the stack at end of function, by using argument count.
The stack layout is mixed up somewhere. I've not got a real fix, but this
diff
gets it a little farther:
diff --git a/src/mips/builtins-mips.cc b/src/mips/builtins-mips.cc
index e7ba9f1..adc4fb5 100644
--- a/src/mips/builtins-mips.cc
+++ b/src/mips/builtins-mips.cc
@@ -646,6 +646,8 @@ static vo
lgtm
https://codereview.chromium.org/1204903004/
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Hi Benedikt - Balázs added mips, mips64 ports in
https://codereview.chromium.org/1211443003/
https://codereview.chromium.org/1205023002/
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l-g-t-m for inclusion in https://codereview.chromium.org/1205023002/
https://codereview.chromium.org/1211443003/
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LGTM.
https://codereview.chromium.org/1191333003/
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LGTM. We need v8 team review of the regression test addition, PTAL.
https://codereview.chromium.org/1192413002/
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lgtm, but this needs v8 team approval. Can you PTAL?
https://codereview.chromium.org/1182713004/
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lgtm
https://codereview.chromium.org/1193433002/
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Reviewers: akos.palfi.imgtec, dusmil.imgtec, Michael Starzinger, rossberg,
balazs.kilvady,
Description:
MIPS: Fix for Remove unsafe EmitLoadRegister usage in AddI/SubI for constant
right operand.
Fix a missed addiu->Addu, and a bad default use of 'at' register in
https://codereview.chromium.or
LGTM, but it needs to be rebased for current master.
https://codereview.chromium.org/1144373003/
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This is going in the right direction, but please see the naming issue in
comments below. You will have to modify code-generator-xxx for all arch's.
https://codereview.chromium.org/1191513003/diff/1/src/compiler/arm/linkage-arm.cc
File src/compiler/arm/linkage-arm.cc (right):
https://codereview.
LGTM.
(MIPS64 will be fixed in separate CL.)
https://codereview.chromium.org/1185143002/
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LGTM. You need to rebase after 9af578a7 (macro-assembler-mips64 changes).
https://codereview.chromium.org/1170923004/
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All the comments in test-assembler-mips64.cc likely also apply to
test-assembler-mips.cc also. Sorry, I was somewhat in-accurate in my
previous
review comments on that file, and I may have misled you a bit about the
runtime
vs generation time issues. I think it is clear now.
https://coderev
LGTM. This does need a v8-team review on a standlone.gypi and
platform/time.cc
as well. Can one of you PTAL?
https://codereview.chromium.org/1133163005/
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More comments, this time in test-assembler-mips.cc. it is really nice to
see
this thorough test coverage!
I'm still not done with the review yet. Feel free to update if you are
ready.
https://codereview.chromium.org/1144373003/diff/40001/test/cctest/test-assembler-mips.cc
File test/cctest
Reviewers: Erik Corry Chromium.org, Michael Achenbach, Jakob, dusmil.imgtec,
Message:
PTAL, this should get the bots green again.
Description:
MIPS: Skip test-heap/TestSizeOfRegExpCode
After https://codereview.chromium.org/1180433003 the code-size exceeeds
the limit for MIPS. We have some optim
We will prioritize this, but I doubt we can land a quick fix today. I think the
MIPS bot gates rolls, so I suggest we put this test on the skip list for now.
(I'll do that)
A little more background on branches: normal MIPS conditional branches have a
16-bit branch offset, with corresponding bra
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