Reviewers: ulan,
Message:
Ulan, please take a look, thanks.
Description:
[Arm]: Make Assembler::movw only emit a movw instruction.
Currently Assembler::movw is really the mov macro instruction, leading to
raw
emit calls to generate the real movw instruction. Replace all calls of mow
with the mov macro instruction (which will emit a movw if appropriate) and
make movw always emit movw.
Please review this at https://codereview.chromium.org/329233002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+4, -11 lines):
M src/arm/assembler-arm.h
M src/arm/assembler-arm.cc
M src/arm/lithium-codegen-arm.cc
Index: src/arm/assembler-arm.cc
diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
index
c3f9ab0b9b2501997a7f83d154b1607c6fad6ca3..84adc04f31c202ab553893a25447b44d0c335099
100644
--- a/src/arm/assembler-arm.cc
+++ b/src/arm/assembler-arm.cc
@@ -1081,8 +1081,7 @@ void Assembler::move_32_bit_immediate(Register rd,
// Make sure the movw/movt doesn't get separated.
BlockConstPoolFor(2);
}
- emit(cond | 0x30*B20 | target.code()*B12 |
- EncodeMovwImmediate(x.imm32_ & 0xffff));
+ movw(target, static_cast<uint32_t>(x.imm32_ & 0xffff), cond);
movt(target, static_cast<uint32_t>(x.imm32_) >> 16, cond);
if (target.code() != rd.code()) {
mov(rd, target, LeaveCC, cond);
@@ -1446,11 +1445,7 @@ void Assembler::mov_label_offset(Register dst,
Label* label) {
void Assembler::movw(Register reg, uint32_t immediate, Condition cond) {
- ASSERT(immediate < 0x10000);
- // May use movw if supported, but on unsupported platforms will try to
use
- // equivalent rotated immed_8 value and other tricks before falling back
to a
- // constant pool load.
- mov(reg, Operand(immediate), LeaveCC, cond);
+ emit(cond | 0x30*B20 | reg.code()*B12 | EncodeMovwImmediate(immediate));
}
Index: src/arm/assembler-arm.h
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
index
812f58f467b5c21fbeb14ca20d30e8beb2f3ec26..86db100e7dd382be0927586ec7b15915b5f9b16e
100644
--- a/src/arm/assembler-arm.h
+++ b/src/arm/assembler-arm.h
@@ -918,10 +918,8 @@ class Assembler : public AssemblerBase {
void mov_label_offset(Register dst, Label* label);
// ARMv7 instructions for loading a 32 bit immediate in two instructions.
- // This may actually emit a different mov instruction, but on an ARMv7 it
- // is guaranteed to only emit one instruction.
+ // The constant for movw and movt should be in the range 0-0xffff.
void movw(Register reg, uint32_t immediate, Condition cond = al);
- // The constant for movt should be in the range 0-0xffff.
void movt(Register reg, uint32_t immediate, Condition cond = al);
void bic(Register dst, Register src1, const Operand& src2,
Index: src/arm/lithium-codegen-arm.cc
diff --git a/src/arm/lithium-codegen-arm.cc b/src/arm/lithium-codegen-arm.cc
index
40747c868c36751f0b76c105bbf0c2abf972683b..66474fc3c3fe1c292d165bfd8b28f58ae7962140
100644
--- a/src/arm/lithium-codegen-arm.cc
+++ b/src/arm/lithium-codegen-arm.cc
@@ -841,7 +841,7 @@ void LCodeGen::DeoptimizeIf(Condition condition,
__ mov(scratch, Operand(count));
__ ldr(r1, MemOperand(scratch));
__ sub(r1, r1, Operand(1), SetCC);
- __ movw(r1, FLAG_deopt_every_n_times, eq);
+ __ mov(r1, Operand(FLAG_deopt_every_n_times), LeaveCC, eq);
__ str(r1, MemOperand(scratch));
__ pop(r1);
--
--
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