Revision: 4920
Author: l...@chromium.org
Date: Wed Jun 23 00:03:34 2010
Log: Lower waste from alignment of deferred code blocks.
Some ARM chips load instructions 8 byte at a time.
Review URL: http://codereview.chromium.org/2809029
http://code.google.com/p/v8/source/detail?r=4920
Modified:
/branches/bleeding_edge/src/arm/assembler-arm.cc
/branches/bleeding_edge/src/codegen.cc
=======================================
--- /branches/bleeding_edge/src/arm/assembler-arm.cc Tue Jun 22 03:07:57
2010
+++ /branches/bleeding_edge/src/arm/assembler-arm.cc Wed Jun 23 00:03:34
2010
@@ -395,7 +395,8 @@
void Assembler::CodeTargetAlign() {
- Align(16); // Tentative value.
+ // Preferred alignment of jump targets on some ARM chips.
+ Align(8);
}
=======================================
--- /branches/bleeding_edge/src/codegen.cc Tue Jun 22 03:07:57 2010
+++ /branches/bleeding_edge/src/codegen.cc Wed Jun 23 00:03:34 2010
@@ -69,7 +69,6 @@
while (!deferred_.is_empty()) {
DeferredCode* code = deferred_.RemoveLast();
ASSERT(masm_ == code->masm());
- masm_->CodeTargetAlign();
// Record position of deferred code stub.
masm_->RecordStatementPosition(code->statement_position());
if (code->position() != RelocInfo::kNoPosition) {
--
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