[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Jason Wang
On Tue, Jun 27, 2023 at 11:17 AM Parav Pandit wrote: > > > > > From: Jason Wang > > Sent: Monday, June 26, 2023 10:38 PM > > > > > > > > Because there is no point of failing it later when actual rw occurs. > > > > Even with admin virtqueue, the hypervisor should be ready for any admin > > command

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Parav Pandit
> From: Jason Wang > Sent: Monday, June 26, 2023 10:38 PM > > > > > Because there is no point of failing it later when actual rw occurs. > > Even with admin virtqueue, the hypervisor should be ready for any admin > command failures somehow. > Yes, device failures can happen regardless. > And

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Jason Wang
On Mon, Jun 26, 2023 at 12:04 PM Parav Pandit wrote: > > > > > From: virtio-comm...@lists.oasis-open.org > open.org> On Behalf Of Jason Wang > > Sent: Monday, June 26, 2023 12:00 AM > > > > This way we just say "make legacy guests work" and > > > this is the problem of the hardware vendor not

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Jason Wang
On Mon, Jun 26, 2023 at 11:52 AM Parav Pandit wrote: > > > > > From: Jason Wang > > Sent: Sunday, June 25, 2023 11:32 PM > > > > Hypervisor flow without involving guest; first sanity round to figure out > > > things > > can work: > > > > Why is this sanity round a must? > > > Because there is no

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Michael S. Tsirkin
On Mon, Jun 26, 2023 at 11:50:24AM +0800, Jason Wang wrote: > > But hardware > > vendors will do that quickly if they can't sell hardware. > > It looks to me that producing a modern only device will be more quick and > easy? > > Thanks Exactly, that's the point. -- MST -

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-26 Thread Michael S. Tsirkin
On Mon, Jun 26, 2023 at 11:59:42AM +0800, Jason Wang wrote: > > - when some weird legacy > > support requirement surfaces, it will be up to the vendor > > to fix. HW vendors are also more agressive in deprecating > > old hardware - they will just stop shipping new > > hardware when there ar

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Parav Pandit
> From: virtio-comm...@lists.oasis-open.org open.org> On Behalf Of Jason Wang > Sent: Monday, June 26, 2023 12:00 AM > > This way we just say "make legacy guests work" and > > this is the problem of the hardware vendor not ours. > > Probably, but we need to try our best to simplify the ven

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Jason Wang
On Fri, Jun 9, 2023 at 3:15 PM Michael S. Tsirkin wrote: > > On Fri, Jun 09, 2023 at 10:06:43AM +0800, Jason Wang wrote: > > On Thu, Jun 8, 2023 at 10:38 PM Parav Pandit wrote: > > > > > > > > > > From: Jason Wang > > > > Sent: Wednesday, June 7, 2023 2:54 AM > > > > > > > Hypervisor can trap th

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Parav Pandit
> From: Jason Wang > Sent: Sunday, June 25, 2023 11:50 PM > > But hardware > > vendors will do that quickly if they can't sell hardware. > > It looks to me that producing a modern only device will be more quick and > easy? AQ based legacy is quick and easy as opposed to other methods captured

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Parav Pandit
> From: Jason Wang > Sent: Sunday, June 25, 2023 11:32 PM > > Hypervisor flow without involving guest; first sanity round to figure out > > things > can work: > > Why is this sanity round a must? > Because there is no point of failing it later when actual rw occurs. > > 1. reset the device

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Jason Wang
On Fri, Jun 9, 2023 at 3:22 PM Michael S. Tsirkin wrote: > > On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > > I would like to keep the stateful interactions of 1.x device outside of > > > 0.9.5. > > > > I don't think this is a real problem, but let's see the drawbacks of > > this

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Jason Wang
On Sun, Jun 11, 2023 at 8:27 AM Michael S. Tsirkin wrote: > > On Fri, Jun 09, 2023 at 05:11:53PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > > Sent: Friday, June 9, 2023 3:22 AM > > > > > > On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > > > > I would like to kee

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-25 Thread Jason Wang
On Sat, Jun 10, 2023 at 1:12 AM Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Friday, June 9, 2023 3:22 AM > > > > On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > > > I would like to keep the stateful interactions of 1.x device outside of > > > > 0.9.5. > > > > > >

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-11 Thread Michael S. Tsirkin
On Sun, Jun 11, 2023 at 08:17:56PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Sunday, June 11, 2023 4:09 PM > > > > > It's not conformant to that statement then :( It's a SHOULD which > > > > means if you know exactly what you are doing, there could be exceptions. > > >

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-11 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 11, 2023 4:09 PM > > > It's not conformant to that statement then :( It's a SHOULD which > > > means if you know exactly what you are doing, there could be exceptions. > > > In this case it's a SHOULD because it was added after 1.0 and we did > >

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-11 Thread Michael S. Tsirkin
On Sun, Jun 11, 2023 at 12:54:53PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Sunday, June 11, 2023 3:15 AM > > > > It's not conformant to that statement then :( It's a SHOULD which means if > > you > > know exactly what you are doing, there could be exceptions. > >

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-11 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 11, 2023 3:15 AM > It's not conformant to that statement then :( It's a SHOULD which means if you > know exactly what you are doing, there could be exceptions. > In this case it's a SHOULD because it was added after 1.0 and we did not find > a

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-11 Thread Michael S. Tsirkin
On Sun, Jun 11, 2023 at 02:08:07AM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Saturday, June 10, 2023 8:27 PM > > > > Interesting this actually violates a spec recommendation: > > > > If a device has successfully negotiated a set of features > > at least once

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-10 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Saturday, June 10, 2023 8:27 PM > > Interesting this actually violates a spec recommendation: > > If a device has successfully negotiated a set of features > at least once (by accepting the FEATURES_OK \field{device > status} bit during dev

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-10 Thread Michael S. Tsirkin
On Fri, Jun 09, 2023 at 05:11:53PM +, Parav Pandit wrote: > > From: Michael S. Tsirkin > > Sent: Friday, June 9, 2023 3:22 AM > > > > On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > > > I would like to keep the stateful interactions of 1.x device outside of > > > > 0.9.5. > >

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-09 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Friday, June 9, 2023 3:22 AM > > On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > > I would like to keep the stateful interactions of 1.x device outside of > > > 0.9.5. > > > > I don't think this is a real problem, but let's see the drawbacks of

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-09 Thread Michael S. Tsirkin
On Fri, Jun 09, 2023 at 02:27:01PM +0800, Jason Wang wrote: > > I would like to keep the stateful interactions of 1.x device outside of > > 0.9.5. > > I don't think this is a real problem, but let's see the drawbacks of > this proposal: > > 1) non-trivial changes of full new transport alike ABI

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-09 Thread Michael S. Tsirkin
On Fri, Jun 09, 2023 at 10:06:43AM +0800, Jason Wang wrote: > On Thu, Jun 8, 2023 at 10:38 PM Parav Pandit wrote: > > > > > > > From: Jason Wang > > > Sent: Wednesday, June 7, 2023 2:54 AM > > > > > Hypervisor can trap the legacy device configuration space write and > > > convert it > > > to cvq

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Jason Wang
On Fri, Jun 9, 2023 at 11:26 AM Parav Pandit wrote: > > > > From: Jason Wang > > Sent: Thursday, June 8, 2023 11:03 PM > > > When legacy drivers are doing feature negotiation, the hypervisor must trap > > and > > negotiate those two features. > Device reset to be trapped as well towards 1.x. It

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Jason Wang > Sent: Thursday, June 8, 2023 11:03 PM > When legacy drivers are doing feature negotiation, the hypervisor must trap > and > negotiate those two features. Device reset to be trapped as well towards 1.x. And this messes the 1.x flow with FEATURES_OK. More citations from the

[virtio-dev] Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Jason Wang
On Fri, Jun 9, 2023 at 10:58 AM Parav Pandit wrote: > > > > From: virtio-comm...@lists.oasis-open.org > open.org> On Behalf Of Jason Wang > > Sent: Thursday, June 8, 2023 10:57 PM > > > > > In order to converge the discussion, maybe you can explain which one > > > > of your 3 use cases and why ca

[virtio-dev] RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: virtio-comm...@lists.oasis-open.org open.org> On Behalf Of Jason Wang > Sent: Thursday, June 8, 2023 10:57 PM > > > In order to converge the discussion, maybe you can explain which one > > > of your 3 use cases and why can't work with _F_LEGACY_HEADER + > _F_LEGACY_MAC. > > Hypervisor do

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Jason Wang
On Fri, Jun 9, 2023 at 10:53 AM Parav Pandit wrote: > > > > From: Jason Wang > > Sent: Thursday, June 8, 2023 10:43 PM > > > > It is passthrough device, none of the 1.x objects are accessible or > > > mediated by > > the hypervisor. > > > > Let me quote my reply once again: > > > > " > > Hypervi

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Jason Wang > Sent: Thursday, June 8, 2023 10:43 PM > > It is passthrough device, none of the 1.x objects are accessible or > > mediated by > the hypervisor. > > Let me quote my reply once again: > > " > Hypervisor just need to prepare > > 1) legacy BAR with legacy config and device c

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Jason Wang
On Fri, Jun 9, 2023 at 10:29 AM Parav Pandit wrote: > > > > From: Jason Wang > > Sent: Thursday, June 8, 2023 10:07 PM > > > I think not since you fail to explain why this approach is better than > > simply > > adding new features like _F_LEGACY_HEADER and _F_LEGACY_MAC. > > Please refer back to

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Jason Wang > Sent: Thursday, June 8, 2023 10:07 PM > I think not since you fail to explain why this approach is better than simply > adding new features like _F_LEGACY_HEADER and _F_LEGACY_MAC. Please refer back to the requirements of cover letter and multiple past discussions. And Mi

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Jason Wang
On Thu, Jun 8, 2023 at 10:38 PM Parav Pandit wrote: > > > > From: Jason Wang > > Sent: Wednesday, June 7, 2023 2:54 AM > > > Hypervisor can trap the legacy device configuration space write and convert > > it > > to cvq commands. > Michael already answered that cvq is not trapped; this is the mai

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Thursday, June 8, 2023 3:04 PM > > Moving now to admin will surely have more back-n-forth as it needs to talk > about PCI part and that PCI part will reside in PCI section. > > well the point is that it's *back" not *forth*. > IOW add the command description

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Michael S. Tsirkin
On Thu, Jun 08, 2023 at 07:00:32PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Thursday, June 8, 2023 2:31 PM > > > > > I'll do a proper review after the forum. Generally lots of small > > > > things. Went looking just to give you a couple of > > > > examples: > > > >

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Thursday, June 8, 2023 2:31 PM > > > I'll do a proper review after the forum. Generally lots of small > > > things. Went looking just to give you a couple of > > > examples: > > > too many mentions of VFs and PFs. > > > text should talk about owner and

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Michael S. Tsirkin
On Thu, Jun 08, 2023 at 03:16:02PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Thursday, June 8, 2023 11:04 AM > > > > On Thu, Jun 08, 2023 at 02:53:28PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > > > Sent: Thursday, June 8, 2023 10:44 AM > > > > > S

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Thursday, June 8, 2023 2:03 PM > > On Thu, Jun 08, 2023 at 03:16:02PM +, Parav Pandit wrote: > > > > > From: Michael S. Tsirkin > > > Sent: Thursday, June 8, 2023 11:04 AM > > > > > > On Thu, Jun 08, 2023 at 02:53:28PM +, Parav Pandit wrote: > > > > >

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Michael S. Tsirkin
On Thu, Jun 08, 2023 at 03:16:02PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Thursday, June 8, 2023 11:04 AM > > > > On Thu, Jun 08, 2023 at 02:53:28PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > > > Sent: Thursday, June 8, 2023 10:44 AM > > > > > S

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Thursday, June 8, 2023 11:04 AM > > On Thu, Jun 08, 2023 at 02:53:28PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > > Sent: Thursday, June 8, 2023 10:44 AM > > > > Since this ABI reflects what we agree on, I would want to raise > > > > for vo

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Michael S. Tsirkin
On Thu, Jun 08, 2023 at 02:53:28PM +, Parav Pandit wrote: > > From: Michael S. Tsirkin > > Sent: Thursday, June 8, 2023 10:44 AM > > > Since this ABI reflects what we agree on, I would want to raise for > > > vote in coming days to be part of 1.3 in few days as we have more than 3 > > weeks to

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Thursday, June 8, 2023 10:44 AM > > Since this ABI reflects what we agree on, I would want to raise for > > vote in coming days to be part of 1.3 in few days as we have more than 3 > weeks to sort out non-ABI language part. > > I think there's a bunch of work to

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Michael S. Tsirkin
On Thu, Jun 08, 2023 at 02:38:43PM +, Parav Pandit wrote: > > > From: Jason Wang > > Sent: Wednesday, June 7, 2023 2:54 AM > > > Hypervisor can trap the legacy device configuration space write and convert > > it > > to cvq commands. > Michael already answered that cvq is not trapped; this i

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-08 Thread Parav Pandit
> From: Jason Wang > Sent: Wednesday, June 7, 2023 2:54 AM > Hypervisor can trap the legacy device configuration space write and convert it > to cvq commands. Michael already answered that cvq is not trapped; this is the main design goal we talked several times that it is passthrough device. S

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-07 Thread Michael S. Tsirkin
On Wed, Jun 07, 2023 at 10:27:12AM +0800, Jason Wang wrote: > On Tue, Jun 6, 2023 at 7:56 PM Michael S. Tsirkin wrote: > > > > On Mon, Jun 05, 2023 at 10:12:59PM +, Parav Pandit wrote: > > > Rolling v4 now. > > > > Great thanks! I think the result will be in a good shape from > > the ABI point

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-07 Thread Michael S. Tsirkin
On Wed, Jun 07, 2023 at 02:54:22PM +0800, Jason Wang wrote: > On Wed, Jun 7, 2023 at 11:06 AM Parav Pandit wrote: > > > > > > > > > From: Jason Wang > > > Sent: Tuesday, June 6, 2023 10:27 PM > > > > > > I can't say I like this. I prefer to do meditation on top of a modern > > > device with > >

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-06 Thread Jason Wang
On Wed, Jun 7, 2023 at 11:06 AM Parav Pandit wrote: > > > > > From: Jason Wang > > Sent: Tuesday, June 6, 2023 10:27 PM > > > > I can't say I like this. I prefer to do meditation on top of a modern > > device with > > some lightweight features like _F_LEAGCY_HEADER. I don't see any advantages >

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-06 Thread Parav Pandit
> From: Jason Wang > Sent: Tuesday, June 6, 2023 10:27 PM > > I can't say I like this. I prefer to do meditation on top of a modern device > with > some lightweight features like _F_LEAGCY_HEADER. I don't see any advantages > of a new legacy ABI over _F_LEGACY_HEADER. I don't want to repeat bu

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-06 Thread Jason Wang
On Tue, Jun 6, 2023 at 7:56 PM Michael S. Tsirkin wrote: > > On Mon, Jun 05, 2023 at 10:12:59PM +, Parav Pandit wrote: > > Rolling v4 now. > > Great thanks! I think the result will be in a good shape from > the ABI point of view. Good job! > > I think so far Jason was the only one with signifi

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-06 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Tuesday, June 6, 2023 7:56 AM > > On Mon, Jun 05, 2023 at 10:12:59PM +, Parav Pandit wrote: > > Rolling v4 now. > > Great thanks! I think the result will be in a good shape from the ABI point of > view. Good job! > Thanks. > I think so far Jason was the

Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-06 Thread Michael S. Tsirkin
On Mon, Jun 05, 2023 at 10:12:59PM +, Parav Pandit wrote: > Rolling v4 now. Great thanks! I think the result will be in a good shape from the ABI point of view. Good job! I think so far Jason was the only one with significant comments on the series so let's see what he says. >From my persona

RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-05 Thread Parav Pandit
> From: virtio-dev@lists.oasis-open.org On > Behalf Of Michael S. Tsirkin > Sent: Monday, June 5, 2023 5:57 PM > > I would surely do that for all future devices which will be self-contained. > > The cost of doing that for legacy is not worth the efforts. > > And since we agree that read/write

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-05 Thread Michael S. Tsirkin
On Mon, Jun 05, 2023 at 04:04:57PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Monday, June 5, 2023 9:50 AM > > > > Can you explain the motivation of : why querying notification offset via > > > the > > group member PF is a problem, if there is." > > > > I tried already

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-05 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Monday, June 5, 2023 9:50 AM > > Can you explain the motivation of : why querying notification offset via the > group member PF is a problem, if there is." > > I tried already, I can repeat if you like: > > So, I am thinking of a model of using a tiny stub d

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-05 Thread Michael S. Tsirkin
On Mon, Jun 05, 2023 at 01:27:04PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Monday, June 5, 2023 1:52 AM > > [..] > > > > E.g. with 1.x using VIRTIO_F_NOTIF_CONFIG_DATA - probably not. > > > > > > > Not really because legacy doesn't have that feature. > > > Legacy noti

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-05 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Monday, June 5, 2023 1:52 AM [..] > > > E.g. with 1.x using VIRTIO_F_NOTIF_CONFIG_DATA - probably not. > > > > > Not really because legacy doesn't have that feature. > > Legacy notifications are subset of 1.x feature. > > This was also discussed. > > So for l

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Sun, Jun 04, 2023 at 11:40:54PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Sunday, June 4, 2023 5:49 PM > > > > Legacy can utilize the 1.x hw plumbing without building new hypothetical > > > PF > > hardware. > > > > Maybe. > > Whether 1.x BAR can be reused for le

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 4, 2023 5:49 PM > > Legacy can utilize the 1.x hw plumbing without building new hypothetical PF > hardware. > > Maybe. > Whether 1.x BAR can be reused for legacy would depend on a bunch of factors. > E.g. with 1.x using VIRTIO_F_NOTIF_CONFIG_DAT

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Sun, Jun 04, 2023 at 03:07:27PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Sunday, June 4, 2023 10:54 AM > > > > Each VF has its own available buffer notification in hardware like 1.x. > > > We do not want to duplicate (and add) such functionality on the PF BAR > >

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 4, 2023 10:54 AM > > Each VF has its own available buffer notification in hardware like 1.x. > > We do not want to duplicate (and add) such functionality on the PF BAR > hardware when it already exists on the VF. > > yes but here we are talking

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Sun, Jun 04, 2023 at 02:48:59PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Sunday, June 4, 2023 10:23 AM > > > > > > > E.g. the notification can include VF# + VQ#? > > > > > > At least as an option? > > > > > No. we discussed this before to have each device on its

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 4, 2023 10:23 AM > > > > > E.g. the notification can include VF# + VQ#? > > > > > At least as an option? > > > > No. we discussed this before to have each device on its own BAR. > > > > Hence no > > > VF# in the doorbell. > > doorbell == availab

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Sun, Jun 04, 2023 at 02:10:16PM +, Parav Pandit wrote: > > > From: Michael S. Tsirkin > > Sent: Sunday, June 4, 2023 9:56 AM > > > > On Sun, Jun 04, 2023 at 01:41:54PM +, Parav Pandit wrote: > > > > > > > > > > From: Michael S. Tsirkin > > > > Sent: Sunday, June 4, 2023 9:34 AM > > >

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 4, 2023 9:56 AM > > On Sun, Jun 04, 2023 at 01:41:54PM +, Parav Pandit wrote: > > > > > > > From: Michael S. Tsirkin > > > Sent: Sunday, June 4, 2023 9:34 AM > > > > > > On Fri, Jun 02, 2023 at 11:36:01PM +0300, Parav Pandit wrote: > > > > Th

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Sun, Jun 04, 2023 at 01:41:54PM +, Parav Pandit wrote: > > > > From: Michael S. Tsirkin > > Sent: Sunday, June 4, 2023 9:34 AM > > > > On Fri, Jun 02, 2023 at 11:36:01PM +0300, Parav Pandit wrote: > > > This short series introduces legacy registers access commands for the > > > owner gro

[virtio-dev] RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Parav Pandit
> From: Michael S. Tsirkin > Sent: Sunday, June 4, 2023 9:34 AM > > On Fri, Jun 02, 2023 at 11:36:01PM +0300, Parav Pandit wrote: > > This short series introduces legacy registers access commands for the > > owner group member PCI PF to access the legacy registers of the member VFs. > > Note t

[virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ

2023-06-04 Thread Michael S. Tsirkin
On Fri, Jun 02, 2023 at 11:36:01PM +0300, Parav Pandit wrote: > This short series introduces legacy registers access commands for the owner > group member PCI PF to access the legacy registers of the member VFs. Note that some work will be needed here to fix up grammar and spelling mistakes. > If