Log Message
DFG should optimize int8 and int16 arrays on ARMv7 https://bugs.webkit.org/show_bug.cgi?id=84503
Reviewed by Oliver Hunt. * assembler/ARMv7Assembler.h: (ARMv7Assembler): (JSC::ARMv7Assembler::ldrsb): (JSC::ARMv7Assembler::ldrsh): * assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::load16Signed): (JSC::MacroAssemblerARMv7::load8Signed): * bytecode/PredictedType.h: (JSC::isActionableIntMutableArrayPrediction): * dfg/DFGNode.h: (JSC::DFG::Node::shouldSpeculateInt8Array): (JSC::DFG::Node::shouldSpeculateInt16Array):
Modified Paths
Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (114808 => 114809)
--- trunk/Source/_javascript_Core/ChangeLog 2012-04-21 00:27:46 UTC (rev 114808)
+++ trunk/Source/_javascript_Core/ChangeLog 2012-04-21 00:31:28 UTC (rev 114809)
@@ -1,3 +1,23 @@
+2012-04-20 Filip Pizlo <fpi...@apple.com>
+
+ DFG should optimize int8 and int16 arrays on ARMv7
+ https://bugs.webkit.org/show_bug.cgi?id=84503
+
+ Reviewed by Oliver Hunt.
+
+ * assembler/ARMv7Assembler.h:
+ (ARMv7Assembler):
+ (JSC::ARMv7Assembler::ldrsb):
+ (JSC::ARMv7Assembler::ldrsh):
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::load16Signed):
+ (JSC::MacroAssemblerARMv7::load8Signed):
+ * bytecode/PredictedType.h:
+ (JSC::isActionableIntMutableArrayPrediction):
+ * dfg/DFGNode.h:
+ (JSC::DFG::Node::shouldSpeculateInt8Array):
+ (JSC::DFG::Node::shouldSpeculateInt16Array):
+
2012-04-20 Oliver Hunt <oli...@apple.com>
Add an ability to find the extent of a callframe
Modified: trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h (114808 => 114809)
--- trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2012-04-21 00:27:46 UTC (rev 114808)
+++ trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2012-04-21 00:31:28 UTC (rev 114809)
@@ -531,9 +531,11 @@
OP_STR_reg_T1 = 0x5000,
OP_STRH_reg_T1 = 0x5200,
OP_STRB_reg_T1 = 0x5400,
+ OP_LDRSB_reg_T1 = 0x5600,
OP_LDR_reg_T1 = 0x5800,
OP_LDRH_reg_T1 = 0x5A00,
OP_LDRB_reg_T1 = 0x5C00,
+ OP_LDRSH_reg_T1 = 0x5E00,
OP_STR_imm_T1 = 0x6000,
OP_LDR_imm_T1 = 0x6800,
OP_STRB_imm_T1 = 0x7000,
@@ -627,6 +629,8 @@
OP_LDRH_imm_T2 = 0xF8B0,
OP_STR_imm_T3 = 0xF8C0,
OP_LDR_imm_T3 = 0xF8D0,
+ OP_LDRSB_reg_T2 = 0xF910,
+ OP_LDRSH_reg_T2 = 0xF930,
OP_LSL_reg_T2 = 0xFA00,
OP_LSR_reg_T2 = 0xFA20,
OP_ASR_reg_T2 = 0xFA40,
@@ -1158,7 +1162,31 @@
else
m_formatter.twoWordOp12Reg4FourFours(OP_LDRB_reg_T2, rn, FourFours(rt, 0, shift, rm));
}
+
+ void ldrsb(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift = 0)
+ {
+ ASSERT(rn != ARMRegisters::pc);
+ ASSERT(!BadReg(rm));
+ ASSERT(shift <= 3);
+
+ if (!shift && !((rt | rn | rm) & 8))
+ m_formatter.oneWordOp7Reg3Reg3Reg3(OP_LDRSB_reg_T1, rm, rn, rt);
+ else
+ m_formatter.twoWordOp12Reg4FourFours(OP_LDRSB_reg_T2, rn, FourFours(rt, 0, shift, rm));
+ }
+ void ldrsh(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift = 0)
+ {
+ ASSERT(rn != ARMRegisters::pc);
+ ASSERT(!BadReg(rm));
+ ASSERT(shift <= 3);
+
+ if (!shift && !((rt | rn | rm) & 8))
+ m_formatter.oneWordOp7Reg3Reg3Reg3(OP_LDRSH_reg_T1, rm, rn, rt);
+ else
+ m_formatter.twoWordOp12Reg4FourFours(OP_LDRSH_reg_T2, rn, FourFours(rt, 0, shift, rm));
+ }
+
void lsl(RegisterID rd, RegisterID rm, int32_t shiftAmount)
{
ASSERT(!BadReg(rd));
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h (114808 => 114809)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h 2012-04-21 00:27:46 UTC (rev 114808)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h 2012-04-21 00:31:28 UTC (rev 114809)
@@ -499,9 +499,10 @@
}
}
- void load16Signed(ArmAddress, RegisterID)
+ void load16Signed(ArmAddress address, RegisterID dest)
{
- unreachableForPlatform();
+ ASSERT(address.type == ArmAddress::HasIndex);
+ m_assembler.ldrsh(dest, address.base, address.u.index, address.u.scale);
}
void load8(ArmAddress address, RegisterID dest)
@@ -518,9 +519,10 @@
}
}
- void load8Signed(ArmAddress, RegisterID)
+ void load8Signed(ArmAddress address, RegisterID dest)
{
- unreachableForPlatform();
+ ASSERT(address.type == ArmAddress::HasIndex);
+ m_assembler.ldrsb(dest, address.base, address.u.index, address.u.scale);
}
protected:
@@ -609,9 +611,9 @@
load8(setupArmAddress(address), dest);
}
- void load8Signed(BaseIndex, RegisterID)
+ void load8Signed(BaseIndex address, RegisterID dest)
{
- unreachableForPlatform();
+ load8Signed(setupArmAddress(address), dest);
}
DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
@@ -649,9 +651,9 @@
m_assembler.ldrh(dest, makeBaseIndexBase(address), address.index, address.scale);
}
- void load16Signed(BaseIndex, RegisterID)
+ void load16Signed(BaseIndex address, RegisterID dest)
{
- unreachableForPlatform();
+ load16Signed(setupArmAddress(address), dest);
}
void load16(ImplicitAddress address, RegisterID dest)
Modified: trunk/Source/_javascript_Core/bytecode/PredictedType.h (114808 => 114809)
--- trunk/Source/_javascript_Core/bytecode/PredictedType.h 2012-04-21 00:27:46 UTC (rev 114808)
+++ trunk/Source/_javascript_Core/bytecode/PredictedType.h 2012-04-21 00:31:28 UTC (rev 114809)
@@ -162,10 +162,8 @@
inline bool isActionableIntMutableArrayPrediction(PredictedType value)
{
return isByteArrayPrediction(value)
-#if CPU(X86) || CPU(X86_64)
|| isInt8ArrayPrediction(value)
|| isInt16ArrayPrediction(value)
-#endif
|| isInt32ArrayPrediction(value)
|| isUint8ArrayPrediction(value)
|| isUint8ClampedArrayPrediction(value)
Modified: trunk/Source/_javascript_Core/dfg/DFGNode.h (114808 => 114809)
--- trunk/Source/_javascript_Core/dfg/DFGNode.h 2012-04-21 00:27:46 UTC (rev 114808)
+++ trunk/Source/_javascript_Core/dfg/DFGNode.h 2012-04-21 00:31:28 UTC (rev 114809)
@@ -707,20 +707,12 @@
bool shouldSpeculateInt8Array()
{
-#if CPU(X86) || CPU(X86_64)
return isInt8ArrayPrediction(prediction());
-#else
- return false;
-#endif
}
bool shouldSpeculateInt16Array()
{
-#if CPU(X86) || CPU(X86_64)
return isInt16ArrayPrediction(prediction());
-#else
- return false;
-#endif
}
bool shouldSpeculateInt32Array()
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