Title: [287511] trunk/Source/_javascript_Core
- Revision
- 287511
- Author
- commit-qu...@webkit.org
- Date
- 2022-01-02 01:07:58 -0800 (Sun, 02 Jan 2022)
Log Message
[RISCV64] Get testmasm building for CPU(RISCV64)
https://bugs.webkit.org/show_bug.cgi?id=234774
Patch by Zan Dobersek <zdober...@igalia.com> on 2022-01-02
Reviewed by Yusuke Suzuki.
Add missing MacroAssemblerRISCV64 methods used in testmasm. Placeholders
are used for now, proper implementations will be introduced later.
In testmasm itself, we avoid testing the condition-flags register values
since, like on MIPS, that register isn't available on RISC-V.
* assembler/MacroAssemblerRISCV64.h:
* assembler/testmasm.cpp:
(JSC::testProbeModifiesStackPointer):
(JSC::testProbeModifiesStackValues):
Modified Paths
Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (287510 => 287511)
--- trunk/Source/_javascript_Core/ChangeLog 2022-01-02 08:20:28 UTC (rev 287510)
+++ trunk/Source/_javascript_Core/ChangeLog 2022-01-02 09:07:58 UTC (rev 287511)
@@ -1,3 +1,21 @@
+2022-01-02 Zan Dobersek <zdober...@igalia.com>
+
+ [RISCV64] Get testmasm building for CPU(RISCV64)
+ https://bugs.webkit.org/show_bug.cgi?id=234774
+
+ Reviewed by Yusuke Suzuki.
+
+ Add missing MacroAssemblerRISCV64 methods used in testmasm. Placeholders
+ are used for now, proper implementations will be introduced later.
+
+ In testmasm itself, we avoid testing the condition-flags register values
+ since, like on MIPS, that register isn't available on RISC-V.
+
+ * assembler/MacroAssemblerRISCV64.h:
+ * assembler/testmasm.cpp:
+ (JSC::testProbeModifiesStackPointer):
+ (JSC::testProbeModifiesStackValues):
+
2021-12-31 Yusuke Suzuki <ysuz...@apple.com>
[JSC] Replace UDIS86 with Zydis
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerRISCV64.h (287510 => 287511)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerRISCV64.h 2022-01-02 08:20:28 UTC (rev 287510)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerRISCV64.h 2022-01-02 09:07:58 UTC (rev 287511)
@@ -471,6 +471,11 @@
m_assembler.mulInsn(dest, lhs, rhs);
}
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(extractUnsignedBitfield32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(extractUnsignedBitfield64);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(insertUnsignedBitfieldInZero32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(insertUnsignedBitfieldInZero64);
+
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(countLeadingZeros32);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(countLeadingZeros64);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(countTrailingZeros32);
@@ -2021,6 +2026,7 @@
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchNeg64, Jump);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchTest8, Jump);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchTest16, Jump);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchTest32, Jump);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchTest64, Jump);
@@ -2637,6 +2643,19 @@
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchAtomicWeakCAS32, JumpList);
MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD_WITH_RETURN(branchAtomicWeakCAS64, JumpList);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionally32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionally64);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionallyFloat);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionallyDouble);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionallyTest32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveConditionallyTest64);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionally32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionally64);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionallyFloat);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionallyDouble);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionallyTest32);
+ MACRO_ASSEMBLER_RISCV64_TEMPLATED_NOOP_METHOD(moveDoubleConditionallyTest64);
+
private:
struct Imm {
template<typename T>
Modified: trunk/Source/_javascript_Core/assembler/testmasm.cpp (287510 => 287511)
--- trunk/Source/_javascript_Core/assembler/testmasm.cpp 2022-01-02 08:20:28 UTC (rev 287510)
+++ trunk/Source/_javascript_Core/assembler/testmasm.cpp 2022-01-02 09:07:58 UTC (rev 287511)
@@ -4766,7 +4766,7 @@
cpu.fpr(id) = bitwise_cast<double>(testWord64(id));
}
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
originalState.spr(flagsSPR) = cpu.spr(flagsSPR);
modifiedFlags = originalState.spr(flagsSPR) ^ flagsMask;
cpu.spr(flagsSPR) = modifiedFlags;
@@ -4795,7 +4795,7 @@
if (!(id & 1))
#endif
CHECK_EQ(cpu.fpr<uint64_t>(id), testWord64(id));
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, modifiedFlags & flagsMask);
#endif
CHECK_EQ(cpu.sp(), modifiedSP);
@@ -4812,7 +4812,7 @@
}
for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
cpu.fpr(id) = originalState.fpr(id);
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
cpu.spr(flagsSPR) = originalState.spr(flagsSPR);
#endif
cpu.sp() = originalSP;
@@ -4832,7 +4832,7 @@
if (!(id & 1))
#endif
CHECK_EQ(cpu.fpr<uint64_t>(id), originalState.fpr<uint64_t>(id));
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, originalState.spr(flagsSPR) & flagsMask);
#endif
CHECK_EQ(cpu.sp(), originalSP);
@@ -4949,7 +4949,7 @@
originalState.fpr(id) = cpu.fpr(id);
cpu.fpr(id) = bitwise_cast<double>(testWord64(id));
}
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
originalState.spr(flagsSPR) = cpu.spr(flagsSPR);
modifiedFlags = originalState.spr(flagsSPR) ^ flagsMask;
cpu.spr(flagsSPR) = modifiedFlags;
@@ -4991,7 +4991,7 @@
if (!(id & 1))
#endif
CHECK_EQ(cpu.fpr<uint64_t>(id), testWord64(id));
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, modifiedFlags & flagsMask);
#endif
CHECK_EQ(cpu.sp(), newSP);
@@ -5017,7 +5017,7 @@
}
for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
cpu.fpr(id) = originalState.fpr(id);
-#if !(CPU(MIPS))
+#if !(CPU(MIPS) || CPU(RISCV64))
cpu.spr(flagsSPR) = originalState.spr(flagsSPR);
#endif
cpu.sp() = originalSP;
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