Branch: refs/heads/main
Home: https://github.com/WebKit/WebKit
Commit: a5111a20792b339d856a1bae5b6cb89a4ddc820b
https://github.com/WebKit/WebKit/commit/a5111a20792b339d856a1bae5b6cb89a4ddc820b
Author: David Degazio <d_dega...@apple.com>
Date: 2022-12-13 (Tue, 13 Dec 2022)
Changed paths:
M Source/JavaScriptCore/wasm/WasmAirIRGenerator64.cpp
Log Message:
-----------
[WebAssembly SIMD] Vector XOR instructions fail SIMDLane assertion on Intel
https://bugs.webkit.org/show_bug.cgi?id=249040
rdar://103189570
Reviewed by Justin Michaud.
Passes an explicit v128 SIMDLane when constructing VectorXor instructions in
AirIRGenerator to implement vectorized comparisons on Intel.
* Source/JavaScriptCore/wasm/WasmAirIRGenerator64.cpp:
(JSC::Wasm::AirIRGenerator64::addSIMDRelOp):
Canonical link: https://commits.webkit.org/257814@main
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