This run is configured for baseline tests only.
flight 71581 qemu-mainline real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71581/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-winxpsp3 17
flight 110485 linux-next real [real]
http://logs.test-lab.xenproject.org/osstest/logs/110485/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-pair20 guest-start/debian fail REGR. vs. 110464
flight 110484 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/110484/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemut-win7-amd64 15 guest-localmigrate/x10 fail REGR. vs.
110465
Hello Juilen,
>> The polling can be minimized if you block the vCPU when there are
>> nothing to do. It would get unblock when you have to schedule him
>> because of a request.
> Thinking a bit more about this. So far, we rely on the domain to use the
> vGIC interrupt controller which require the
This run is configured for baseline tests only.
flight 71580 linux-4.1 real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71580/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
Hello George,
On 31 May 2017 at 20:02, George Dunlap wrote:
>>> There is no way out: if the stubdom needs events, then we'll have to
>>> expose and context switch the vGIC. If it doesn't, then we can skip the
>>> vGIC. However, we would have a similar problem with EL0
flight 110478 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/110478/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-xsm 13 saverestore-support-checkfail like 110458
test-armhf-armhf-libvirt 13
On Wed, 14 Jun 2017, Volodymyr Babchuk wrote:
> SMCCC (SMC Call Convention) describes how to handle both HVCs and SMCs.
> SMCCC states that both HVC and SMC are valid conduits to call to a different
> firmware functions. Thus, for example PSCI calls can be made both by
> SMC or HVC. Also SMCCC
On Fri, 16 Jun 2017, Julien Grall wrote:
> Hi Stefano,
>
> On 06/16/2017 06:33 PM, Stefano Stabellini wrote:
> > On Fri, 16 Jun 2017, Julien Grall wrote:
> > > Hi Stefano,
> > >
> > > On 15/06/2017 23:28, Stefano Stabellini wrote:
> > > > On Tue, 13 Jun 2017, Julien Grall wrote:
> > > > >
Please append these two patches at the end of the remaining set of the
"xen/arm: Extend the usage of typesafe MFN" series, when you repost.
On Thu, 15 Jun 2017, Julien Grall wrote:
> This small patch series is moving out LPAE definition from page.h. This is
> based on my series "xen/arm: Extend
On Thu, 15 Jun 2017, Julien Grall wrote:
> Also adding one missing full stop.
>
> Signed-off-by: Julien Grall
Reviewed-by: Stefano Stabellini
> xen/include/asm-arm/lpae.h | 45 ++---
> 1 file changed, 30
On Thu, 15 Jun 2017, Julien Grall wrote:
> page.h is getting bigger. Move out every LPAE definitions in a separate
> header. There is no functional changes.
>
> Signed-off-by: Julien Grall
> ---
> xen/include/asm-arm/lpae.h | 169
>
Add a warning: use passthrough with care.
Add a pointer to the gic device tree bindings. Add an explanation on how
to calculate irq numbers from device tree.
Add a brief explanation of the reg property and a pointer to the xl docs
for a description of the iomem property. Add a note that in the
On Fri, 2017-06-16 at 10:41 -0700, Stefano Stabellini wrote:
> On Fri, 16 Jun 2017, Dario Faggioli wrote:
> >
> > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> > index 76310ed..86cd612 100644
> > --- a/xen/arch/arm/domain.c
> > +++ b/xen/arch/arm/domain.c
> > @@ -41,20 +41,28 @@
flight 110474 xen-4.9-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/110474/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemut-win7-amd64 15 guest-localmigrate/x10 fail REGR. vs.
110417
On 06/16/2017 10:20 PM, Petre Pircalabu wrote:
> Add test for write_ctrlreg event handling.
>
> Signed-off-by: Petre Pircalabu
> ---
> tools/tests/xen-access/xen-access.c | 53
> -
> 1 file changed, 52 insertions(+), 1 deletion(-)
flight 110480 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/110480/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-libvirt-xsm 6 xen-boot fail REGR. vs. 110460
Add support for filtering out the write_ctrlreg monitor events if they
are generated only by changing certains bits.
A new parameter (bitmask) was added to the xc_monitor_write_ctrlreg
function in order to mask the event generation if the changed bits are
set.
Signed-off-by: Petre Pircalabu
This patchset enables masking the reception of write_ctrlreg events depending
on the value of certain bits in that register.
The most representative example is filtering out events when the CR4.PGE
bit is being flipped (global TLB flushes)
---
Changed since v2
* fix coding style.
* use
Add test for write_ctrlreg event handling.
Signed-off-by: Petre Pircalabu
---
tools/tests/xen-access/xen-access.c | 53 -
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/tools/tests/xen-access/xen-access.c
Hi Tamas,
[...]
>> +
>> +if ( ((flag & GV2M_WRITE) == GV2M_WRITE) && !(perms & GV2M_WRITE) )
>
> Wouldn't it be enough to do (flag & GV2M_WRITE) without the following
> comparison? Also, a comment explaining why this is an error-condition
> would be nice.
>
Yes, you are absolutely
Add support to check if SME has been enabled and if memory encryption
should be activated (checking of command line option based on the
configuration of the default state). If memory encryption is to be
activated, then the encryption mask is set and the kernel is encrypted
"in place."
Add the support to encrypt the kernel in-place. This is done by creating
new page mappings for the kernel - a decrypted write-protected mapping
and an encrypted mapping. The kernel is encrypted by copying it through
a temporary buffer.
Signed-off-by: Tom Lendacky
---
Add a cmdline_find_option() function to look for cmdline options that
take arguments. The argument is returned in a supplied buffer and the
argument length (regardless of whether it fits in the supplied buffer)
is returned, with -1 indicating not found.
Signed-off-by: Tom Lendacky
When accessing memory using /dev/mem (or /dev/kmem) use the proper
encryption attributes when mapping the memory.
To insure the proper attributes are applied when reading or writing
/dev/mem, update the xlate_dev_mem_ptr() function to use memremap()
which will essentially perform the same steps
The IOMMU is programmed with physical addresses for the various tables
and buffers that are used to communicate between the device and the
driver. When the driver allocates this memory it is encrypted. In order
for the IOMMU to access the memory as encrypted the encryption mask needs
to be
Xen does not currently support SME for PV guests. Clear the SME cpu
capability in order to avoid any ambiguity.
Signed-off-by: Tom Lendacky
---
arch/x86/xen/enlighten_pv.c |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/xen/enlighten_pv.c
Update the KVM support to work with SME. The VMCB has a number of fields
where physical addresses are used and these addresses must contain the
memory encryption mask in order to properly access the encrypted memory.
Also, use the memory encryption mask when creating and using the nested
page
Provide support so that kexec can be used to boot a kernel when SME is
enabled.
Support is needed to allocate pages for kexec without encryption. This
is needed in order to be able to reboot in the kernel in the same manner
as originally booted.
Additionally, when shutting down all of the CPUs
Since video memory needs to be accessed decrypted, be sure that the
memory encryption mask is not set for the video ranges.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/vga.h | 14 +-
Add support to check if memory encryption is active in the kernel and that
it has been enabled on the AP. If memory encryption is active in the kernel
but has not been enabled on the AP, then set the memory encryption bit (bit
23) of MSR_K8_SYSCFG to enable memory encryption on that AP and allow
Move the setting of the cpuinfo_x86.microcode field from amd_init() to
early_amd_init() so that it is available earlier in the boot process. This
avoids having to read MSR_AMD64_PATCH_LEVEL directly during early boot.
Signed-off-by: Tom Lendacky
---
Add warnings to let the user know when bounce buffers are being used for
DMA when SME is active. Since the bounce buffers are not in encrypted
memory, these notifications are to allow the user to determine some
appropriate action - if necessary. Actions can range from utilizing an
IOMMU,
When Secure Memory Encryption is enabled, the trampoline area must not
be encrypted. A CPU running in real mode will not be able to decrypt
memory that has been encrypted because it will not be able to use addresses
with the memory encryption mask.
Signed-off-by: Tom Lendacky
Since DMA addresses will effectively look like 48-bit addresses when the
memory encryption mask is set, SWIOTLB is needed if the DMA mask of the
device performing the DMA does not support 48-bits. SWIOTLB will be
initialized to create decrypted bounce buffers for use by these devices.
Add support for changing the memory encryption attribute for one or more
memory pages. This will be useful when we have to change the AP trampoline
area to not be encrypted. Or when we need to change the SWIOTLB area to
not be encrypted in support of devices that can't support the encryption
mask
Persistent memory is expected to persist across reboots. The encryption
key used by SME will change across reboots which will result in corrupted
persistent memory. Persistent memory is handed out by block devices
through memory remapping functions, so be sure not to map this memory as
encrypted.
The SMP MP-table is built by UEFI and placed in memory in a decrypted
state. These tables are accessed using a mix of early_memremap(),
early_memunmap(), phys_to_virt() and virt_to_phys(). Change all accesses
to use early_memremap()/early_memunmap(). This allows for proper setting
of the
Boot data (such as EFI related data) is not encrypted when the system is
booted because UEFI/BIOS does not run with SME active. In order to access
this data properly it needs to be mapped decrypted.
Update early_memremap() to provide an arch specific routine to modify the
pagetable protection
When SME is active, pagetable entries created for EFI need to have the
encryption mask set as necessary.
When the new pagetable pages are allocated they are mapped encrypted. So,
update the efi_pgt value that will be used in cr3 to include the encryption
mask so that the PGD table can be read
The efi_mem_type() function currently returns a 0, which maps to
EFI_RESERVED_TYPE, if the function is unable to find a memmap entry for
the supplied physical address. Returning EFI_RESERVED_TYPE implies that
a memmap entry exists, when it doesn't. Instead of returning 0, change
the function to
Add a function that will determine if a supplied physical address matches
the address of an EFI table.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
drivers/firmware/efi/efi.c | 33 +
include/linux/efi.h
The boot data and command line data are present in memory in a decrypted
state and are copied early in the boot process. The early page fault
support will map these areas as encrypted, so before attempting to copy
them, add decrypted mappings so the data is accessed properly when copied.
For the
Add a function that will return the E820 type associated with an address
range.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/e820/api.h |2 ++
arch/x86/kernel/e820.c | 26 +++---
2
Add early_memremap() support to be able to specify encrypted and
decrypted mappings with and without write-protection. The use of
write-protection is necessary when encrypting data "in place". The
write-protect attribute is considered cacheable for loads, but not
stores. This implies that the
Add support to be able to either encrypt or decrypt data in place during
the early stages of booting the kernel. This does not change the memory
encryption attribute - it is used for ensuring that data present in either
an encrypted or decrypted memory area is in the proper state (for example
the
The cr3 register entry can contain the SME encryption mask that indicates
the PGD is encrypted. The encryption mask should not be used when
creating a virtual address from the cr3 register, so remove the SME
encryption mask in the read_cr3_pa() function.
During early boot SME will need to use a
Add support to the early boot code to use Secure Memory Encryption (SME).
Since the kernel has been loaded into memory in a decrypted state, encrypt
the kernel in place and update the early pagetables with the memory
encryption mask so that new pagetable entries will use memory encryption.
The
Add support for Secure Memory Encryption (SME). This initial support
provides a Kconfig entry to build the SME support into the kernel and
defines the memory encryption mask that will be used in subsequent
patches to mark pages as encrypted.
Reviewed-by: Borislav Petkov
Changes to the existing page table macros will allow the SME support to
be enabled in a simple fashion with minimal changes to files that use these
macros. Since the memory encryption mask will now be part of the regular
pagetable macros, we introduce two new macros (_PAGE_TABLE_NOENC and
Create a pgd_pfn() macro similar to the p[um]d_pfn() macros and then
use the p[gum]d_pfn() macros in the p[gum]d_page() macros instead of
duplicating the code.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/pgtable.h |
Currently there is a check if the address being mapped is in the ISA
range (is_ISA_range()), and if it is then phys_to_virt() is used to
perform the mapping. When SME is active, however, this will result
in the mapping having the encryption bit set when it is expected that
an ioremap() should not
When System Memory Encryption (SME) is enabled, the physical address
space is reduced. Adjust the x86_phys_bits value to reflect this
reduction.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
arch/x86/kernel/cpu/amd.c | 10 +++---
1
The ioremap() function is intended for mapping MMIO. For RAM, the
memremap() function should be used. Convert calls from ioremap() to
memremap() when re-mapping RAM.
This will be used later by SME to control how the encryption mask is
applied to memory mappings, with certain memory locations
Update the CPU features to include identifying and reporting on the
Secure Memory Encryption (SME) feature. SME is identified by CPUID
0x801f, but requires BIOS support to enable it (set bit 23 of
MSR_K8_SYSCFG). Only show the SME feature as available if reported by
CPUID and enabled by
For processors that support PAT, set the write-protect cache mode
(_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
Acked-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
arch/x86/mm/pat.c |6 +++---
1 file changed, 3
This patch series provides support for AMD's new Secure Memory Encryption (SME)
feature.
SME can be used to mark individual pages of memory as encrypted through the
page tables. A page of memory that is marked encrypted will be automatically
decrypted when read from DRAM and will be automatically
Create a Documentation entry to describe the AMD Secure Memory
Encryption (SME) feature and add documentation for the mem_encrypt=
kernel parameter.
Reviewed-by: Borislav Petkov
Signed-off-by: Tom Lendacky
---
Hi Julien,
On 06/16/2017 08:23 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 06/16/2017 04:44 PM, Sergej Proskurin wrote:
>> Thanks. I have moved the upper helpers to page.h for now and renamed
>> them to lpae_* helpers as part of my most recent patch version. The
>> submission will follow soon.
>
Hi Sergej,
On 06/16/2017 04:44 PM, Sergej Proskurin wrote:
Thanks. I have moved the upper helpers to page.h for now and renamed
them to lpae_* helpers as part of my most recent patch version. The
submission will follow soon.
They should go in the new file lpae.h (you were CCed on the patch
Hi Stefano,
On 06/16/2017 06:33 PM, Stefano Stabellini wrote:
On Fri, 16 Jun 2017, Julien Grall wrote:
Hi Stefano,
On 15/06/2017 23:28, Stefano Stabellini wrote:
On Tue, 13 Jun 2017, Julien Grall wrote:
xenheap_mfn_end is storing an MFN and not a physical address. Thankfully
xenheap_mfn_end
Signed-off-by: Anthony PERARD
---
ts-openstack-deploy | 14 ++
1 file changed, 14 insertions(+)
diff --git a/ts-openstack-deploy b/ts-openstack-deploy
index 2107760..04317a0 100755
--- a/ts-openstack-deploy
+++ b/ts-openstack-deploy
@@ -130,6 +130,20 @@
Devstack is going to try to install a specific version of libvirt-python
(currently 2.5.0) but this fail with libvirt installed by osstest.
Remove the requirement and use the latest available instead.
Signed-off-by: Anthony PERARD
---
ts-openstack-deploy | 15
nova-network is not supported anymore and Neutron is the default.
Signed-off-by: Anthony PERARD
---
ap-common | 3 ++-
make-flight | 2 +-
ts-openstack-deploy | 8 +---
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/ap-common
With 4G for dom0_mem, a host running devstack is using about 1.5G of
swap.
Signed-off-by: Anthony PERARD
---
make-flight | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/make-flight b/make-flight
index ff4f17e..a0c9d2b 100755
--- a/make-flight
+++
Signed-off-by: Anthony PERARD
---
ts-openstack-deploy | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ts-openstack-deploy b/ts-openstack-deploy
index cffbb5d..c21689d 100755
--- a/ts-openstack-deploy
+++ b/ts-openstack-deploy
@@ -177,7 +177,7 @@ sub
OpenStack have many different repo which should be in sync, so this
patch should grab the revisions of the stable branch of every OpenStack
tree. Tempest does not have stable branch and should be able to test any
OpenStack version.
This patch also create flight for the latest release of OpenStack
Signed-off-by: Anthony PERARD
---
ts-logs-capture | 6 ++
1 file changed, 6 insertions(+)
diff --git a/ts-logs-capture b/ts-logs-capture
index 061a118..0e3d267 100755
--- a/ts-logs-capture
+++ b/ts-logs-capture
@@ -171,6 +171,12 @@ sub fetch_logs_host () {
./run_tempest.sh is deprecated.
Signed-off-by: Anthony PERARD
---
ts-openstack-tempest | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ts-openstack-tempest b/ts-openstack-tempest
index 82e9a71..b95043a 100755
--- a/ts-openstack-tempest
+++
Signed-off-by: Anthony PERARD
---
ts-openstack-deploy | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ts-openstack-deploy b/ts-openstack-deploy
index 8f6c7a2..cffbb5d 100755
--- a/ts-openstack-deploy
+++ b/ts-openstack-deploy
@@ -58,7 +58,7 @@
Signed-off-by: Anthony PERARD
---
ts-openstack-tempest | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/ts-openstack-tempest b/ts-openstack-tempest
index b95043a..ae3662f 100755
--- a/ts-openstack-tempest
+++
Signed-off-by: Anthony PERARD
---
ts-openstack-deploy | 10 ++
1 file changed, 10 insertions(+)
diff --git a/ts-openstack-deploy b/ts-openstack-deploy
index 04317a0..04053de 100755
--- a/ts-openstack-deploy
+++ b/ts-openstack-deploy
@@ -144,6 +144,16 @@ END
Besides removing the last instance of the set_dma_mask method this also
reduced the code duplication.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/platforms/cell/iommu.c | 25 +
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git
This just duplicates the generic implementation.
Signed-off-by: Christoph Hellwig
---
drivers/xen/swiotlb-xen.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index c3a04b2d7532..82fc54f8eb77 100644
---
These just duplicate the default behavior if no method is provided.
Signed-off-by: Christoph Hellwig
---
arch/tile/kernel/pci-dma.c | 30 --
1 file changed, 30 deletions(-)
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c
index
Signed-off-by: Christoph Hellwig
---
arch/powerpc/kernel/dma.c | 4
include/linux/dma-mapping.h | 6 --
2 files changed, 10 deletions(-)
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 41c749586bd2..466c9f07b288 100644
---
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/dma-mapping.h | 1 -
arch/powerpc/kernel/dma.c | 13 -
2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/dma-mapping.h
Same behavior, less code duplication.
Signed-off-by: Christoph Hellwig
---
arch/arm/common/dmabounce.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 6ecd5be5d37e..9a92de63426f 100644
---
By the time cell_pci_dma_dev_setup calls cell_dma_dev_setup no device can
have the fixed map_ops set yet as it's only set by the set_dma_mask
method. So move the setup for the fixed case to be only called in that
place instead of indirecting through cell_dma_dev_setup.
Signed-off-by: Christoph
This implementation is simply bogus - openrisc only has a simple
direct mapped DMA implementation and thus doesn't care about the
address.
Signed-off-by: Christoph Hellwig
---
arch/openrisc/include/asm/dma-mapping.h | 7 ---
1 file changed, 7 deletions(-)
diff --git
These just duplicate the default behavior if no method is provided.
Signed-off-by: Christoph Hellwig
---
lib/dma-virt.c | 12
1 file changed, 12 deletions(-)
diff --git a/lib/dma-virt.c b/lib/dma-virt.c
index dcd4df1f7174..5c4f11329721 100644
--- a/lib/dma-virt.c
+++
And instead wire it up as method for all the dma_map_ops instances.
Note that the code seems a little fishy for dmabounce and iommu, but
for now I'd like to preserve the existing behavior 1:1.
Signed-off-by: Christoph Hellwig
---
arch/arm/common/dmabounce.c| 1 +
And instead wire it up as method for all the dma_map_ops instances.
Note that this also means the arch specific check will be fully instead
of partially applied in the AMD iommu driver.
Signed-off-by: Christoph Hellwig
---
arch/x86/include/asm/dma-mapping.h | 3 ---
Same behavior, less code duplication.
Signed-off-by: Christoph Hellwig
---
arch/mips/loongson64/common/dma-swiotlb.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/arch/mips/loongson64/common/dma-swiotlb.c
Signed-off-by: Christoph Hellwig
---
include/linux/dma-mapping.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index a57875309bfd..3e5908656226 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
Signed-off-by: Christoph Hellwig
---
arch/hexagon/include/asm/dma-mapping.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/hexagon/include/asm/dma-mapping.h
b/arch/hexagon/include/asm/dma-mapping.h
index 9c15cb5271a6..463dbc18f853 100644
---
This implementation is simply bogus - hexagon only has a simple
direct mapped DMA implementation and thus doesn't care about the
address.
Signed-off-by: Christoph Hellwig
Acked-by: Richard Kuo
---
arch/hexagon/include/asm/dma-mapping.h | 2 --
Usually dma_supported decisions are done by the dma_map_ops instance.
Switch sparc to that model by providing a ->dma_supported instance for
sbus that always returns false, and implementations tailored to the sun4u
and sun4v cases for sparc64, and leave it unimplemented for PCI on
sparc32, which
We can just use pci32_dma_ops directly.
Signed-off-by: Christoph Hellwig
Acked-by: David S. Miller
---
arch/sparc/include/asm/dma-mapping.h | 3 +--
arch/sparc/kernel/ioport.c | 5 +
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git
These just duplicate the default behavior if no method is provided.
Signed-off-by: Christoph Hellwig
---
lib/dma-noop.c | 12
1 file changed, 12 deletions(-)
diff --git a/lib/dma-noop.c b/lib/dma-noop.c
index de26c8b68f34..643a074f139d 100644
--- a/lib/dma-noop.c
+++
DMA_ERROR_CODE is going to go away, so don't rely on it.
Signed-off-by: Christoph Hellwig
---
arch/x86/kernel/pci-calgary_64.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/pci-calgary_64.c
Signed-off-by: Christoph Hellwig
Acked-by: Richard Kuo
---
arch/hexagon/include/asm/dma-mapping.h | 2 --
arch/hexagon/kernel/dma.c | 12 +---
arch/hexagon/kernel/hexagon_ksyms.c| 1 -
3 files changed, 9 insertions(+), 6 deletions(-)
DMA_ERROR_CODE is going to go away, so don't rely on it.
Signed-off-by: Christoph Hellwig
---
arch/x86/kernel/pci-nommu.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index
DMA_ERROR_CODE is going to go away, so don't rely on it. Instead
define a ->mapping_error method for all IOMMU based dma operation
instances. The direct ops don't ever return an error and don't
need a ->mapping_error method.
Signed-off-by: Christoph Hellwig
Acked-by: Michael
All dma_map_ops instances now handle their errors through
->mapping_error.
Signed-off-by: Christoph Hellwig
---
arch/x86/include/asm/dma-mapping.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/include/asm/dma-mapping.h
b/arch/x86/include/asm/dma-mapping.h
index
DMA_ERROR_CODE is going to go away, so don't rely on it.
Signed-off-by: Christoph Hellwig
---
arch/arm/common/dmabounce.c| 13 +---
arch/arm/include/asm/dma-iommu.h | 2 ++
arch/arm/include/asm/dma-mapping.h | 1 -
arch/arm/mm/dma-mapping.c | 41
DMA_ERROR_CODE is going to go away, so don't rely on it.
Signed-off-by: Christoph Hellwig
---
drivers/iommu/amd_iommu.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index
And update the documentation - dma_mapping_error has been supported
everywhere for a long time.
Signed-off-by: Christoph Hellwig
---
Documentation/DMA-API-HOWTO.txt | 31 +--
include/linux/dma-mapping.h | 5 -
2 files changed, 5 insertions(+),
The dma alloc interface returns an error by return NULL, and the
mapping interfaces rely on the mapping_error method, which the dummy
ops already implement correctly.
Thus remove the DMA_ERROR_CODE define.
Signed-off-by: Christoph Hellwig
Reviewed-by: Robin Murphy
s390 can also use noop_dma_ops, and while that currently does not return
errors it will so in the future. Implementing the mapping_error method
is the proper way to have per-ops error conditions.
Signed-off-by: Christoph Hellwig
Acked-by: Gerald Schaefer
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