From: Chen, Tiejun
Sent: Friday, June 12, 2015 4:19 PM
+ *
+ * #3. High memory region if it exists
+ */
+for ( i = 0; i memory_map.nr_map; i++ )
{
-e820[nr].addr = ((uint64_t)1 32);
-e820[nr].size =
-
From: Chen, Tiejun
Sent: Friday, June 12, 2015 4:25 PM
@@ -1792,6 +1794,8 @@ int xc_assign_dt_device(
domctl.u.assign_device.dev = XEN_DOMCTL_DEV_DT;
domctl.u.assign_device.u.dt.size = size;
+/* DT doesn't own any RDM. */
+domctl.u.assign_device.flag =
From: Chen, Tiejun
Sent: Friday, June 12, 2015 5:00 PM
On 2015/6/11 18:22, Tian, Kevin wrote:
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
Before we refine RMRR mechanism, USB RMRR may conflict with guest bios
region so we always ignore USB RMRR.
If USB RMRR
From: Chen, Tiejun
Sent: Friday, June 12, 2015 3:54 PM
bar_data |= (uint32_t)base;
bar_data_upper = (uint32_t)(base 32);
+for ( j = 0; j memory_map.nr_map ; j++ )
+{
+if ( memory_map.map[j].type != E820_RAM )
+{
+
From: Chen, Tiejun
Sent: Friday, June 12, 2015 1:58 PM
On 2015/6/12 10:43, Chen, Tiejun wrote:
On 2015/6/11 22:07, Tim Deegan wrote:
At 17:31 +0800 on 11 Jun (1434043916), Chen, Tiejun wrote:
while ( base_pfn end_pfn )
{
-int err = intel_iommu_map_page(d,
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
This patch enables XENMEM_memory_map in hvm. So we can use it to
setup the e820 mappings.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
Reviewed-by: Tim Deegan t...@xen.org
Reviewed-by: Kevin Tian kevin.t...@intel.com
---
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, June 11, 2015 3:28 PM
On 11.06.15 at 03:15, tiejun.c...@intel.com wrote:
v3:
* Rearrange all patches orderly as Wei suggested
* Rebase on the latest tree
* Address some Wei's comments on tools side
* Two changes for
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, June 11, 2015 5:33 PM
On 11.06.15 at 10:38, kevin.t...@intel.com wrote:
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:04 PM
Add support for handling PMU interrupts for PV(H)
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
While building a VM, HVM domain builder provides struct hvm_info_table{}
to help hvmloader. Currently it includes two fields to construct guest
e820 table by hvmloader, low_mem_pgend and high_mem_pgend. So we should
check them to fix
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
Currently we're intending to cover this kind of devices
we're - we're not?
with shared RMRR simply since the case of shared RMRR is
a rare case according to our previous experiences. But
late we can group these devices which shared
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
From: Jan Beulich jbeul...@suse.com
This is a prerequisite for punching holes into HVM and PVH guests' P2M
to allow passing through devices that are associated with (on VT-d)
RMRRs.
Signed-off-by: Jan Beulich jbeul...@suse.com
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
Now we can use that memory map to build our final
e820 table but it may need to reorder all e820
entries.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
tools/firmware/hvmloader/e820.c | 62
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
This patch extends the existing hypercall to support rdm reservation policy.
We return error or just throw out a warning message depending on whether
the policy is strict or relaxed when reserving RDM regions in pfn space.
Note in
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
This patch passes rdm reservation policy to xc_assign_device() so the policy
is checked when assigning devices to a VM.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
tools/libxc/include/xenctrl.h | 3 ++-
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:04 PM
Add support for handling PMU interrupts for PV(H) guests.
VPMU for the interrupted VCPU is unloaded until the guest issues XENPMU_flush
hypercall. This allows the guest to access PMU MSR
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
We will introduce the hypercall xc_reserved_device_memory_map
approach to libxc. This helps us get rdm entry info according to
different parameters. If flag == PCI_DEV_RDM_ALL, all entries
should be exposed. Or we just expose that
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:05 PM
Since PMU is now not HVM specific we can move VPMU-related files up from
arch/x86/hvm/ directory.
Specifically:
arch/x86/hvm/vpmu.c - arch/x86/cpu/vpmu.c
arch/x86/hvm/svm/vpmu.c -
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
Now we get this map layout by call XENMEM_memory_map then
save them into one global variable memory_map[]. It should
include lowmem range, rdm range and highmem range. Note
rdm range and highmem range may not exist in some cases.
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
We will create this sort of identity mapping as follows:
If the gfn space is unoccupied, we just set the mapping. If the space
is already occupied by 1:1 mappings, do nothing. Failed for any
other cases.
If space is already
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
When allocating mmio address for PCI bars, we need to make
sure they don't overlap with reserved regions.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
tools/firmware/hvmloader/pci.c | 36
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
Before we refine RMRR mechanism, USB RMRR may conflict with guest bios
region so we always ignore USB RMRR.
If USB RMRR conflicts with guest bios, the conflict is always there
before and after your refinement. :-)
Now this can be
From: Chen, Tiejun
Sent: Thursday, June 11, 2015 9:15 AM
RMRR reserved regions must be setup in the pfn space with an identity
mapping to reported mfn. However existing code has problem to setup
correct mapping when VT-d shares EPT page table, so lead to problem
when assigning devices (e.g
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, June 11, 2015 2:58 PM
All,
we're seeing recurring but intermittent failures in osstest on just the
two hosts using these particular CPU types. The closest similar ones,
using Xeon E5-2407 v2, do not exhibit this same behavior.
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Friday, June 05, 2015 7:26 PM
Also make dmar_{read,write}q() actually do what their names suggest (we
don't need to be concerned of 32-bit restrictions anymore).
Signed-off-by: Jan Beulich jbeul...@suse.com
Acked-by: Kevin Tian
From: Alan Robinson [mailto:alan.robin...@ts.fujitsu.com]
Sent: Monday, June 08, 2015 6:05 PM
From: Alan Robinson alan.robin...@ts.fujitsu.com
commit 6d112f2b50 (x86/vPMU: change Intel model numbers from decimal
to hex) translated 47 to 0x27, now corrected to 0x2f.
Signed-off-by: Alan
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Thursday, June 11, 2015 10:54 PM
On 06/11/2015 04:17 AM, Tian, Kevin wrote:
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
switch ( vendor )
{
case X86_VENDOR_AMD:
-ret
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:04 PM
Add runtime interface for setting PMU mode and flags. Three main modes are
provided:
* XENPMU_MODE_OFF: PMU is not virtualized
* XENPMU_MODE_SELF: Guests can access PMU MSRs and receive PMU
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:04 PM
Code for initializing/tearing down PMU for PV guests
Signed-off-by: Boris Ostrovsky boris.ostrov...@oracle.com
Acked-by: Daniel De Graaf dgde...@tycho.nsa.gov
Acked-by: Jan Beulich
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, June 10, 2015 11:04 PM
No need to compute those masks on every MSR access.
Also, when checking MSR_P6_EVNTSELx registers make sure that bit 21
(which is a reserved bit) is not set.
Signed-off-by: Boris Ostrovsky
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Friday, June 05, 2015 10:28 PM
On 06/05/2015 09:53 AM, wei.l...@citrix.com wrote:
* VPMU - 'perf' support in Xen (good)
v21 posted
Need reviews/final ack.
- Boris Ostrovsky
I posted a version last week
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, June 02, 2015 2:30 PM
On 02.06.15 at 02:39, kevin.t...@intel.com wrote:
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, June 01, 2015 5:17 PM
On 01.06.15 at 08:30, kevin.t...@intel.com wrote:
From:
From: elena.ufimts...@oracle.com [mailto:elena.ufimts...@oracle.com]
Sent: Saturday, May 30, 2015 5:39 AM
From: Elena Ufimtseva elena.ufimts...@oracle.com
On some platforms RMRR regions may be not specified
in ACPI and thus will not be mapped 1:1 in dom0. This
causes IO Page Faults and
From: Razvan Cojocaru [mailto:rcojoc...@bitdefender.com]
Sent: Friday, May 29, 2015 9:46 PM
As suggested by Andrew Cooper, this patch attempts to remove
some redundancy and allow for an easier time when adding vm_events
for new control registers in the future, by having a single
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, June 01, 2015 5:17 PM
On 01.06.15 at 08:30, kevin.t...@intel.com wrote:
From: elena.ufimts...@oracle.com
[mailto:elena.ufimts...@oracle.com]
--- a/docs/misc/xen-command-line.markdown
+++ b/docs/misc/xen-command-line.markdown
From: elena.ufimts...@oracle.com [mailto:elena.ufimts...@oracle.com]
Sent: Saturday, May 30, 2015 5:39 AM
From: Elena Ufimtseva elena.ufimts...@oracle.com
In preparation for auxiliary RMRR data provided on Xen
command line, make RMRR adding a separate function.
Also free memery for rmrr
From: elena.ufimts...@oracle.com [mailto:elena.ufimts...@oracle.com]
Sent: Saturday, May 30, 2015 5:35 AM
From: Elena Ufimtseva elena.ufimts...@oracle.com
Release memory allocated for scope.devices when disabling
dmar units. Also set device count after memory allocation when
device scope
From: Tian, Kevin
Sent: Monday, June 01, 2015 12:43 PM
and looks you dropped earlier changes to acpi_parse_one_rmrr. any
elaboration why it's not required in this version?
Thanks
Kevin
Never mind this one. Seems you have it in RMRR patch set.
Thanks
Kevin
From: Roger Pau Monne [mailto:roger@citrix.com]
Sent: Thursday, May 21, 2015 8:15 PM
Enabling posted interrupts requires the virtual interrupt delivery feature,
which is disabled for PVH guests, so make sure posted interrupts are also
disabled or else vmlaunch will fail.
From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
Sent: Wednesday, May 20, 2015 10:05 PM
This makes it more succinct and easier to read.
Before:
(XEN) Sysenter RSP= CS:RIP=:
(XEN) CS: sel=0x0008, attr=0x0c09b, limit=0x,
From: Roger Pau Monne [mailto:roger@citrix.com]
Sent: Thursday, May 07, 2015 10:54 PM
Since a PVH hardware domain has access to the physical hardware create a
custom more permissive IO bitmap. The permissions set on the bitmap are
populated based on the contents of the ioports rangeset.
From: Wei Liu [mailto:wei.l...@citrix.com]
Sent: Tuesday, May 19, 2015 4:00 AM
On Thu, May 14, 2015 at 04:27:45PM +0800, Chen, Tiejun wrote:
On 2015/5/11 19:32, Wei Liu wrote:
On Mon, May 11, 2015 at 04:09:53PM +0800, Chen, Tiejun wrote:
On 2015/5/8 22:43, Wei Liu wrote:
Sorry for the
From: Wu, Feng
Sent: Friday, May 08, 2015 5:07 PM
VT-d Posted-Interrupts is an enhancement to CPU side Posted-Interrupt.
With VT-d Posted-Interrupts enabled, external interrupts from
direct-assigned devices can be delivered to guests without VMM
intervention when guest is running in
From: Tim Deegan [mailto:t...@xen.org]
Sent: Thursday, April 30, 2015 7:04 PM
At 16:19 +0800 on 24 Apr (1429892368), Kai Huang wrote:
v2-v3:
- Merged v2 patch 02 (document change) to patch 01 as a single patch, and
changed new parameter description as suggested by Andrew.
-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, April 23, 2015 10:00 PM
On 23.04.15 at 14:32, tiejun.c...@intel.com wrote:
On 2015/4/16 23:40, Tim Deegan wrote:
At 17:21 +0800 on 10 Apr (1428686518), Tiejun Chen wrote:
@@ -1851,7 +1857,14 @@ static int
From: Chen, Tiejun
Sent: Monday, May 04, 2015 7:26 PM
On 2015/5/4 18:52, Tian, Kevin wrote:
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, May 04, 2015 6:44 PM
On 04.05.15 at 12:39, tiejun.c...@intel.com wrote:
On 2015/5/4 16:52, Jan Beulich wrote:
On 04.05.15 at 04:16
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, May 04, 2015 6:44 PM
On 04.05.15 at 12:39, tiejun.c...@intel.com wrote:
On 2015/5/4 16:52, Jan Beulich wrote:
On 04.05.15 at 04:16, tiejun.c...@intel.com wrote:
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, April 21, 2015 3:31 PM
Just like the other messages in this function this one should be issued
through plain printk() - the current vCPU is irrelevant here. (Noticed
while backporting to older trees, which don't have gprintk().)
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Tuesday, April 21, 2015 2:05 PM
On 04/17/2015 10:31 AM, Kai Huang wrote:
On 04/17/2015 06:39 AM, Tian, Kevin wrote:
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Wednesday, April 15, 2015 3:04 PM
A new 4K page
From: Tim Deegan [mailto:t...@xen.org]
Sent: Thursday, April 16, 2015 11:16 PM
Hi,
At 17:21 +0800 on 10 Apr (1428686517), Tiejun Chen wrote:
RMRR reserved regions must be setup in the pfn space with an identity
mapping to reported mfn. However existing code has problem to setup
From: Tim Deegan [mailto:t...@xen.org]
Sent: Thursday, April 16, 2015 11:24 PM
At 16:10 +0100 on 16 Apr (1429200644), Jan Beulich wrote:
On 16.04.15 at 16:59, t...@xen.org wrote:
At 17:21 +0800 on 10 Apr (1428686513), Tiejun Chen wrote:
diff --git a/xen/include/public/memory.h
From: Li, Liang Z
Sent: Friday, April 17, 2015 4:50 AM
... making the code better document itself. No functional change
intended.
Signed-off-by: Liang Li liang.z...@intel.com
Acked-by: Kevin Tian kevin.t...@intel.com
---
xen/arch/x86/hvm/vmx/vmx.c | 11 ++-
1 file changed, 6
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, April 16, 2015 11:52 PM
On 15.04.15 at 09:03, kai.hu...@linux.intel.com wrote:
@@ -190,9 +196,15 @@ static int hap_enable_log_dirty(struct domain *d,
bool_t log_global)
d-arch.paging.mode |= PG_log_dirty;
From: Tian, Kevin
Sent: Friday, April 17, 2015 6:57 AM
+int vmx_domain_enable_pml(struct domain *d)
+{
+struct vcpu *v;
+int rc;
+
+ASSERT(atomic_read(d-pause_count));
+
+if ( vmx_domain_pml_enabled(d) )
+return 0;
+
+for_each_vcpu( d, v
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Wednesday, April 15, 2015 3:04 PM
The patch adds PML definition and feature detection. Note PML won't be
detected
if PML is disabled from boot parameter. PML is also disabled in
construct_vmcs,
as it will only be enabled when domain
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Wednesday, April 15, 2015 3:04 PM
This patch adds help functions to enable/disable PML, and flush PML buffer for
single vcpu and particular domain for further use.
Signed-off-by: Kai Huang kai.hu...@linux.intel.com
---
From: Ian Jackson [mailto:ian.jack...@eu.citrix.com]
Sent: Wednesday, April 15, 2015 9:10 PM
Tiejun Chen writes ([RFC][PATCH 04/13] tools/libxl: detect and avoid
conflicts
with RDM):
While building a VM, HVM domain builder provides struct hvm_info_table{}
to help hvmloader. Currently
From: Wu, Feng
Sent: Wednesday, April 08, 2015 7:02 PM
and how do you handle ON is set after above check? looks this is better
handled behind cmpxchg loop...
- If 'ON' is set before 'if ( pi_test_on(old) == 1 )', return
- If 'ON' is not set before it, and is set after it, '
From: Wu, Feng
Sent: Thursday, April 02, 2015 4:40 PM
-Original Message-
From: Tian, Kevin
Sent: Thursday, April 02, 2015 2:25 PM
To: Wu, Feng; xen-devel@lists.xen.org
Cc: jbeul...@suse.com; k...@xen.org; Zhang, Yang Z
Subject: RE: [RFC v1 13/15] Update Posted-Interrupts
From: Wu, Feng
Sent: Thursday, April 02, 2015 3:18 PM
-Original Message-
From: Tian, Kevin
Sent: Thursday, April 02, 2015 2:01 PM
To: Wu, Feng; xen-devel@lists.xen.org
Cc: jbeul...@suse.com; k...@xen.org; Zhang, Yang Z
Subject: RE: [RFC v1 11/15] vmx: Add a global wake-up
From: Wu, Feng
Sent: Thursday, April 02, 2015 4:03 PM
-Original Message-
From: Tian, Kevin
Sent: Thursday, April 02, 2015 2:50 PM
To: Wu, Feng; xen-devel@lists.xen.org
Cc: jbeul...@suse.com; k...@xen.org; Zhang, Yang Z
Subject: RE: [RFC v1 08/15] Update IRTE according
From: Tim Deegan [mailto:t...@xen.org]
Sent: Thursday, March 26, 2015 7:10 PM
Hi, VMX maintainers,
I was looking at the nested EPT code while following up on Ed's email
about altp2m design, and I can't see where nested-EPT entries get
removed when a host EPT entry is removed/changed.
From: Wu, Feng
Sent: Wednesday, March 25, 2015 8:32 PM
The basic idea here is:
1. When vCPU's state is RUNSTATE_running,
- set 'NV' to 'Notification Vector'.
- Clear 'SN' to accpet PI.
- set 'NDST' to the right pCPU.
2. When vCPU's state is RUNSTATE_blocked,
From: Wu, Feng
Sent: Friday, March 27, 2015 12:58 PM
-Original Message-
From: Zhang, Yang Z
Sent: Friday, March 27, 2015 12:44 PM
To: Wu, Feng; xen-devel@lists.xen.org
Cc: jbeul...@suse.com; k...@xen.org; Tian, Kevin
Subject: RE: [RFC v1 12/15] vmx: Properly handle
From: Wu, Feng
Sent: Thursday, April 02, 2015 2:21 PM
-Original Message-
From: Tian, Kevin
Sent: Thursday, April 02, 2015 1:52 PM
To: Wu, Feng; xen-devel@lists.xen.org
Cc: jbeul...@suse.com; k...@xen.org; Zhang, Yang Z
Subject: RE: [RFC v1 08/15] Update IRTE according
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Friday, March 27, 2015 5:58 PM
On 27.03.15 at 02:53, feng...@intel.com wrote:
From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
Sent: Friday, March 27, 2015 3:01 AM
On 25/03/15 12:31, Feng Wu wrote:
---
From: Wu, Feng
Sent: Wednesday, March 25, 2015 8:32 PM
This patch adds a global vector which is used to wake up
the blocked vCPU when an interrupt is being posted to it.
Signed-off-by: Feng Wu feng...@intel.com
Suggested-by: Yang Zhang yang.z.zh...@intel.com
---
From: Wu, Feng
Sent: Wednesday, March 25, 2015 8:32 PM
This patch adds a new per-vCPU tasklet to wakeup the blocked
vCPU. It can be used in the case vcpu_unblock cannot be called
directly.
could you elaborate under which scenario vcpu_unblock can't
be called directly?
Signed-off-by:
From: Wu, Feng
Sent: Wednesday, March 25, 2015 8:32 PM
When guest changes its interrupt configuration (such as, vector, etc.)
for direct-assigned devices, we need to update the associated IRTE
with the new guest vector, so external interrupts from the assigned
devices can be injected to
From: Wu, Feng
Sent: Wednesday, March 25, 2015 8:32 PM
This patch adds an API which is used to update the IRTE
for posted-interrupt when guest changes MSI/MSI-X information.
Signed-off-by: Feng Wu feng...@intel.com
---
xen/drivers/passthrough/vtd/intremap.c | 83
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, March 23, 2015 11:44 PM
This just follows what the January 2015 edition of the SDM documents,
with additional clarification from Intel:
- Broadwell models 0x4f and 0x56 don't cross-reference other tables,
but should be treated
From: Wu, Feng
Sent: Monday, March 23, 2015 5:19 PM
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Monday, March 23, 2015 5:08 PM
To: Wu, Feng
Cc: Tian, Kevin; Zhang, Yang Z; xen-devel@lists.xen.org; Keir Fraser
(k...@xen.org)
Subject: RE: (v2
PM
To: Wu, Feng
Cc: Jan Beulich; Zhang, Yang Z; Tian, Kevin; xen-devel@lists.xen.org
Subject: Re: [Xen-devel] VT-d Posted-interrupt (PI) design for XEN
At 02:07 + on 06 Mar (1425604054), Wu, Feng wrote:
From: Tim Deegan [mailto:t...@xen.org]
But I don't understand why we would
From: elena.ufimts...@oracle.com [mailto:elena.ufimts...@oracle.com]
Sent: Monday, March 09, 2015 10:43 PM
From: Elena Ufimtseva elena.ufimts...@oracle.com
In preparation for auxiliary RMRR data provided on Xen
command line, make RMRR adding a separate function.
No code changes.
From: elena.ufimts...@oracle.com [mailto:elena.ufimts...@oracle.com]
Sent: Monday, March 09, 2015 10:43 PM
From: Elena Ufimtseva elena.ufimts...@oracle.com
On some platforms RMRR regions may be not specified
in ACPI and thus will not be mapped 1:1 in dom0. This
causes IO Page Faults and
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Friday, February 27, 2015 5:52 PM
Even if VT-d code alone (i.e. when not sharing tables with EPT) still
doesn't support superpages, this function - invoked upon DMA remapping
faults - needs to cope with such.
While at it also replace a
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Friday, March 06, 2015 5:33 PM
Kevin, Yang,
there are a number of patches requiring your ack or otherwise:
sorry for delay. Just back from Chinese New Year holiday, and below bugs are
on my review list planned to close early next week.
From: Tim Deegan [mailto:t...@xen.org]
Sent: Thursday, February 12, 2015 8:42 PM
At 07:08 + on 12 Feb (1423721283), Tian, Kevin wrote:
for general log dirty, ept_invalidate_emt is required because there is
access permission change (dirtied page becomes rw after 1st fault,
so need
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Thursday, February 12, 2015 10:39 AM
PML needs to be enabled (allocate PML buffer, initialize PML index,
PML base address, turn PML on VMCS, etc) for all vcpus of the domain,
as PML buffer and PML index are per-vcpu, but EPT table
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Thursday, February 12, 2015 2:46 PM
On 02/12/2015 02:25 PM, Tian, Kevin wrote:
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Thursday, February 12, 2015 10:35 AM
On 02/11/2015 09:13 PM, Jan Beulich wrote
From: Kai Huang [mailto:kai.hu...@linux.intel.com]
Sent: Thursday, February 12, 2015 10:35 AM
On 02/11/2015 09:13 PM, Jan Beulich wrote:
On 11.02.15 at 12:52, andrew.coop...@citrix.com wrote:
On 11/02/15 08:28, Kai Huang wrote:
With PML, we don't have to use write protection but just
From: Tamas K Lengyel [mailto:tamas.leng...@zentific.com]
Sent: Friday, January 30, 2015 5:47 AM
In preparation for allowing for introspecting ARM and PV domains the old
control interface via the hvm_op hypercall is retired. A new control
mechanism
is introduced via the domctl hypercall:
From: Li, Liang Z
Sent: Wednesday, February 04, 2015 11:28 AM
Flushing cache is needed only when guest has IOMMU device, using
need_iommu(d) can minimize the impact to guest with device assigned,
since a guest may be hot plugged with a device thus there may be dirty
cache lines before
From: Tamas K Lengyel [mailto:tamas.leng...@zentific.com]
Sent: Friday, January 30, 2015 5:47 AM
To avoid growing hvm.c these functions can be stored
separately.
Signed-off-by: Tamas K Lengyel tamas.leng...@zentific.com
VMX changes are clearly renaming:
Acked-by: Kevin Tian
From: Zhang, Yang Z
Sent: Wednesday, February 04, 2015 1:54 PM
Tian, Kevin wrote on 2015-02-04:
From: Li, Liang Z
Sent: Wednesday, February 04, 2015 11:28 AM
Flushing cache is needed only when guest has IOMMU device, using
need_iommu(d) can minimize the impact to guest with device
From: Elena Ufimtseva [mailto:elena.ufimts...@oracle.com]
Sent: Tuesday, January 27, 2015 11:06 PM
On Tue, Jan 27, 2015 at 06:41:39AM +, Tian, Kevin wrote:
From: Elena Ufimtseva [mailto:elena.ufimts...@oracle.com]
Sent: Tuesday, January 27, 2015 1:31 AM
On Mon, Jan 26, 2015
From: Don Slutz [mailto:dsl...@verizon.com]
Sent: Tuesday, January 27, 2015 4:31 AM
The question is about the VM-exit instruction length field.
This is accessed in xen via:
__vmread(VM_EXIT_INSTRUCTION_LEN, inst_len);
an example of which is in routine get_instruction_length().
From: Elena Ufimtseva [mailto:elena.ufimts...@oracle.com]
Sent: Tuesday, January 27, 2015 1:31 AM
On Mon, Jan 26, 2015 at 05:06:12PM +, Jan Beulich wrote:
On 26.01.15 at 17:57, elena.ufimts...@oracle.com wrote:
On Fri, Jan 23, 2015 at 10:50:23AM +, Jan Beulich wrote:
On
From: Li, Liang Z
Sent: Friday, January 23, 2015 1:55 PM
On 22.01.15 at 08:44, yang.z.zh...@intel.com wrote:
Tian, Kevin wrote on 2015-01-22:
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Wednesday, January 21, 2015 6:31 PM
Yes, it's true. But I still don't understand
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Thursday, January 22, 2015 10:01 PM
... making the code better document itself. No functional change
intended.
Signed-off-by: Jan Beulich jbeul...@suse.com
Acked-by: Kevin Tian kevin.t...@intel.com
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Wednesday, January 21, 2015 6:31 PM
Yes, it's true. But I still don't understand why to do the flush_all just
when
iommu_enable is true. Could you explain why ?
The question you raise doesn't reflect what the function does: It
From: Li, Liang Z
Sent: Thursday, January 22, 2015 12:29 PM
-Original Message-
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Wednesday, January 21, 2015 7:22 PM
To: Li, Liang Z
Cc: Andrew Cooper; Dong, Eddie; Tian, Kevin; Zhang, Yang Z; xen-
de...@lists.xen.org; k
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 7:08 PM
..., yielding better code.
Signed-off-by: Jan Beulich jbeul...@suse.com
Acked-by: Kevin Tian kevin.t...@intel.com
___
Xen-devel mailing list
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 7:08 PM
Most of them have been unused since the dropping of 32-bit support, and
the few remaining cases are more efficiently dealt with using a generic
macro (and probably things should have been done that way from
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 7:07 PM
A few relevant control state fields did not get dumped so far; in
particular, VM_ENTRY_INSTRUCTION_LEN got printed twice (instead of also
printing VM_EXIT_INSTRUCTION_LEN). Where suitable (to reduce the
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 7:06 PM
A few host state fields did not get dumped so far. Where suitable (to
reduce the amount of output) make some of the dumping conditional upon
guest settings (this isn't required for correctness as vmr()
From: Elena Ufimtseva [mailto:elena.ufimts...@oracle.com]
Sent: Thursday, January 22, 2015 4:53 AM
need_iommu has to be set earler for dom0 pvh specific init
functions. If not enabled, mmio regions are not mapped with iommu
during domain construction.
This was discovered when working on
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 4:43 PM
On 20.01.15 at 01:52, kevin.t...@intel.com wrote:
We may make a reasonable simplification to treat all RMRRs 1MB as
conflicts (all real observations so far are in BIOS region).
I'm not really agreeing
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 3:29 PM
On 20.01.15 at 01:45, kevin.t...@intel.com wrote:
From: Jan Beulich [mailto:jbeul...@suse.com]
The proposed new hypercall represents _only_ reserved regions.
But it was said several times that making
From: George Dunlap
Sent: Tuesday, January 20, 2015 8:57 PM
On Tue, Jan 20, 2015 at 12:52 AM, Tian, Kevin kevin.t...@intel.com wrote:
For RMRRs in the BIOS area, libxl will already need to know where that
area is (to know that it doesn't need to fit it into the MMIO hole); if
we just
From: Jan Beulich [mailto:jbeul...@suse.com]
Sent: Tuesday, January 20, 2015 6:49 PM
On 20.01.15 at 11:38, ian.campb...@citrix.com wrote:
On Tue, 2015-01-20 at 09:10 +, Jan Beulich wrote:
On 20.01.15 at 09:59, kevin.t...@intel.com wrote:
From: Jan Beulich
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